DSPIC33FJ64MC706-I/PT Microchip Technology, DSPIC33FJ64MC706-I/PT Datasheet - Page 33
![IC DSPIC MCU/DSP 64K 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
DSPIC33FJ64MC706-I/PT
Manufacturer Part Number
DSPIC33FJ64MC706-I/PT
Description
IC DSPIC MCU/DSP 64K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.MA330013.pdf
(370 pages)
2.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
3.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
4.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
Specifications of DSPIC33FJ64MC706-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Core Frequency
40MHz
Embedded Interface Type
ECAN, I2C, SPI, UART
No. Of I/o's
53
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To
Package
64TQFP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
53
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
32-chx10-bit|32-chx12-bit
Number Of Timers
9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC706-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
DSPIC33FJ64MC706-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
8.12
Some pins for the I/O pin functions are multiplexed with
an alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
All I/O port pins have three registers directly associated
with the operation of the port pin. The Data Direction
register determines whether the pin is an input or an
output. The Port Data Latch register provides latched
output data for the I/O pins. The Port register provides
visibility of the logic state of the I/O pins. Reading the
Port register provides the I/O pin logic state, while
writes to the Port register write the data to the Port Data
Latch register.
I/O port pins have latch bits (Port Data Latch register).
This register, when read, yields the contents of the I/O
latch and when written, modifies the contents of the I/O
latch, thus modifying the value driven out on a pin if the
corresponding Data Direction register bit is configured
for output. This can be used in read-modify-write
instructions that allow the user to modify the contents
of the Port Data Latch register, regardless of the status
of the corresponding pins.
© 2005 Microchip Technology Inc.
I/O Pins
Preliminary
The I/O pins have the following features:
• Schmitt Trigger input
• CMOS output drivers
• Weak internal pull-up
All I/O pins configured as digital inputs can accept 5V
signals. This provides a degree of compatibility with
external signals of different voltage levels. However, all
digital outputs and analog pins can only generate
voltage levels up to 3.6V.
The input change notification module gives dsPIC33F
devices the ability to generate interrupt requests to the
processor in response to a change of state on selected
input pins. This module is capable of detecting input
changes of state, even in Sleep mode, when the clocks
are disabled. There are up to 24 external signals (CN0
through CN23) that can be selected (enabled) for
generating an interrupt request on a change of state.
Each of the CN pins also has an optional weak pull-up
feature.
dsPIC33F
DS70155C-page 31