DSPIC30F2011-30I/ML Microchip Technology, DSPIC30F2011-30I/ML Datasheet - Page 81
![IC DSPIC MCU/DSP 12K 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC30F2011-30I/ML
Manufacturer Part Number
DSPIC30F2011-30I/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(206 pages)
Specifications of DSPIC30F2011-30I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DAF30-4 - DEVICE ATP FOR ICE4000
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F201130IML
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F2011-20ISO PDF datasheet #2
- DSPIC30F2011-20ISO PDF datasheet #3
- DSPIC30F2011-20ISO PDF datasheet #4
- DSPIC30F2011-20ISO PDF datasheet #5
- DSPIC30F2011-20IP PDF datasheet #6
- Current page: 81 of 206
- Download datasheet (3Mb)
TABLE 10-1:
TMR2
TMR3HLD
TMR3
PR2
PR3
T2CON
T3CON
Legend:
Note:
SFR Name Addr.
u = uninitialized bit; — = unimplemented bit, read as ‘0’
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
010A
010C
010E
0106
0108
0110
0112
TIMER2/3 REGISTER MAP
Bit 15
TON
TON
Bit 14
—
—
Bit 13
TSIDL
TSIDL
Bit 12
—
—
Bit 11
—
—
Bit 10
Timer3 Holding Register (for 32-bit timer operations only)
—
—
Bit 9
—
—
Bit 8
—
—
Period Register 2
Period Register 3
Timer2 Register
Timer3 Register
Bit 7
—
—
TGATE
TGATE
Bit 6
TCKPS1 TCKPS0
TCKPS1 TCKPS0
Bit 5
Bit 4
Bit 3
T32
—
Bit 2
—
—
Bit 1
TCS
TCS
Bit 0
—
—
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
1111 1111 1111 1111
1111 1111 1111 1111
0000 0000 0000 0000
0000 0000 0000 0000
Reset State
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