DSPIC30F2011-30I/ML Microchip Technology, DSPIC30F2011-30I/ML Datasheet - Page 61
![IC DSPIC MCU/DSP 12K 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC30F2011-30I/ML
Manufacturer Part Number
DSPIC30F2011-30I/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(206 pages)
Specifications of DSPIC30F2011-30I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DAF30-4 - DEVICE ATP FOR ICE4000
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F201130IML
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F2011-20ISO PDF datasheet #2
- DSPIC30F2011-20ISO PDF datasheet #3
- DSPIC30F2011-20ISO PDF datasheet #4
- DSPIC30F2011-20ISO PDF datasheet #5
- DSPIC30F2011-20IP PDF datasheet #6
- Current page: 61 of 206
- Download datasheet (3Mb)
TABLE 7-1:
TABLE 7-2:
TABLE 7-3:
TABLE 7-4:
TRISB
PORTB
LATB
Legend:
TRISB
PORTB
LATB
Legend:
TRISC
PORTC
LATC
Legend:
TRISD
PORTD
LATD
Legend:
Name
Name
Name
Name
SFR
SFR
SFR
SFR
Addr.
02D2
02D4
02D6
Addr.
02C6
02C8
02CB
Addr.
02C6
02C8
02CB
Addr.
02CC
02CE
02D0
— = unimplemented bit, read as ‘0’
— = unimplemented bit, read as ‘0’
— = unimplemented bit, read as ‘0’
— = unimplemented bit, read as ‘0’
Bit 15
Bit 15
Bit 15
—
—
—
—
—
—
—
—
—
PORTB REGISTER MAP FOR dsPIC30F2011/3012
PORTB REGISTER MAP FOR dsPIC30F2012/3013
PORTC REGISTER MAP FOR dsPIC30F2011/2012/3012/3013
PORTD REGISTER MAP FOR dsPIC30F2011/3012
TRISC15 TRISC14 TRISC13
LATC15
Bit 15
RC15
Bit 14
Bit 14
Bit 14
—
—
—
—
—
—
—
—
—
LATC14
Bit 14
RC14
Bit 13
Bit 13
Bit 13
—
—
—
—
—
—
—
—
—
LATC13
Bit 13
RC13
Bit 12
Bit 12
Bit 12
—
—
—
—
—
—
—
—
—
Bit 12
—
—
—
Bit 11
Bit 11
Bit 11
—
—
—
—
—
—
—
—
—
Bit 11
—
—
—
Bit 10
Bit 10
Bit 10
Bit 10
—
—
—
—
—
—
—
—
—
—
—
—
TRISB9
Bit 9
LATB9
Bit 9
Bit 9
Bit 9
—
—
—
RB9
—
—
—
—
—
—
Bit 8
—
—
—
TRISB8 TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 0000 0011 1111 1111
LATB8
Bit 8
Bit 8
Bit 8
RB8
—
—
—
—
—
—
Bit 7
—
—
—
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 0000 0000 1111 1111
LATB7
LATB7
Bit 7
Bit 7
Bit 7
RB7
RB7
—
—
—
Bit 6
—
—
—
LATB6
LATB6
Bit 6
Bit 6
Bit 6
RB6
RB6
—
—
—
Bit 5
—
—
—
LATB5
LATB5
Bit 5
Bit 5
Bit 5
RB5
RB5
—
—
—
Bit 4
—
—
—
LATB4
LATB4
Bit 4
Bit 4
RB4
RB4
Bit 4
—
—
—
Bit 3
—
—
—
LATB3
LATB3
Bit 3
Bit 3
RB3
RB3
Bit 3
—
—
—
Bit 2
—
—
—
LATB2
LATB2
Bit 2
Bit 2
RB2
RB2
Bit 2
—
—
—
Bit 1
—
—
—
LATB1
LATB1
Bit 1
Bit 1
RB1
RB1
Bit 1
—
—
—
Bit 0
LATB0
LATB0
TRISD0 0000 0000 0000 0001
—
—
—
Bit 0
Bit 0
LATD0
RB0
RB0
Bit 0
RD0
1110 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Reset State
Reset State
Reset State
Reset State
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