ATMEGA16-16AQ Atmel, ATMEGA16-16AQ Datasheet - Page 56

MCU AVR 16K FLASH 16MHZ 44-TQFP

ATMEGA16-16AQ

Manufacturer Part Number
ATMEGA16-16AQ
Description
MCU AVR 16K FLASH 16MHZ 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA16-16AQ

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16-16AQ
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA16-16AQR
Manufacturer:
Atmel
Quantity:
10 000
2466T–AVR–07/10
Table 21
ure 26
the modules having the alternate function.
Table 21. Generic Description of Overriding Signals for Alternate Functions
The following subsections shortly describe the alternate functions for each port, and relate the
overriding signals to the alternate function. Refer to the alternate function description for further
details.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
are not shown in the succeeding tables. The overriding signals are generated internally in
summarizes the function of the overriding signals. The pin and port indexes from
Full Name
Pull-up Override
Enable
Pull-up Override
Value
Data Direction
Override Enable
Data Direction
Override Value
Port Value Override
Enable
Port Value Override
Value
Digital Input Enable
Override Enable
Digital Input Enable
Override Value
Digital Input
Analog Input/ output
Description
If this signal is set, the pull-up enable is controlled by
the PUOV signal. If this signal is cleared, the pull-up is
enabled when {DDxn, PORTxn, PUD} = 0b010.
If PUOE is set, the pull-up is enabled/disabled when
PUOV is set/cleared, regardless of the setting of the
DDxn, PORTxn, and PUD Register bits.
If this signal is set, the Output Driver Enable is
controlled by the DDOV signal. If this signal is cleared,
the Output driver is enabled by the DDxn Register bit.
If DDOE is set, the Output Driver is enabled/disabled
when DDOV is set/cleared, regardless of the setting of
the DDxn Register bit.
If this signal is set and the Output Driver is enabled,
the port value is controlled by the PVOV signal. If
PVOE is cleared, and the Output Driver is enabled, the
port Value is controlled by the PORTxn Register bit.
If PVOE is set, the port value is set to PVOV,
regardless of the setting of the PORTxn Register bit.
If this bit is set, the Digital Input Enable is controlled by
the DIEOV signal. If this signal is cleared, the Digital
Input Enable is determined by MCU-state (Normal
Mode, sleep modes).
If DIEOE is set, the Digital Input is enabled/disabled
when DIEOV is set/cleared, regardless of the MCU
state (Normal Mode, sleep modes).
This is the Digital Input to alternate functions. In the
figure, the signal is connected to the output of the
schmitt trigger but before the synchronizer. Unless the
Digital Input is used as a clock source, the module with
the alternate function will use its own synchronizer.
This is the Analog Input/output to/from alternate
functions. The signal is connected directly to the pad,
and can be used bi-directionally.
ATmega16(L)
Fig-
56

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