ATMEGA16-16AQ Atmel, ATMEGA16-16AQ Datasheet - Page 167

• Manufacturer Part Number: ATMEGA16-16AQ
• Description: MCU AVR 16K FLASH 16MHZ 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16-16AQ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

USART Baud Rate
Registers – UBRRL
and UBRRH
2466T–AVR–07/10
• Bit 2:1 – UCSZ1:0: Character Size
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits (Char-
acter Size) in a frame the Receiver and Transmitter use.
Table 66. UCSZ Bits Settings
• Bit 0 – UCPOL: Clock Polarity
This bit is used for Synchronous mode only. Write this bit to zero when Asynchronous mode is
used. The UCPOL bit sets the relationship between data output change and data input sample,
and the synchronous clock (XCK).
Table 67. UCPOL Bit Settings
The UBRRH Register shares the same I/O location as the UCSRC Register. See the
UBRRH/ UCSRC Registers” on page 162
• Bit 15 – URSEL: Register Select
This bit selects between accessing the UBRRH or the UCSRC Register. It is read as zero when
reading UBRRH. The URSEL must be zero when writing the UBRRH.
• Bit 14:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRH is written.
Bit
Read/Write
Initial Value
UCPOL
0
1
UCSZ2
0
0
0
0
1
1
1
1
Transmitted Data Changed (Output of
TxD Pin)
Rising XCK Edge
Falling XCK Edge
URSEL
R/W
R/W
15
7
0
0
R/W
14
UCSZ1
R
–
6
0
0
0
0
1
1
0
0
1
1
R/W
13
R
–
5
0
0
R/W
12
R
–
4
0
0
UBRR[7:0]
section which describes how to access this register.
UCSZ0
0
1
0
1
0
1
0
1
R/W
R/W
11
3
0
0
Received Data Sampled (Input on
RxD Pin)
Rising XCK Edge
Falling XCK Edge
R/W
R/W
10
2
0
0
UBRR[11:8]
Character Size
R/W
R/W
9
1
0
0
Reserved
Reserved
Reserved
5-bit
6-bit
7-bit
8-bit
9-bit
ATmega16(L)
R/W
R/W
8
0
0
0
UBRRH
UBRRL
“Accessing
167