ATMEGA16-16AQ Atmel, ATMEGA16-16AQ Datasheet - Page 113

MCU AVR 16K FLASH 16MHZ 44-TQFP

ATMEGA16-16AQ

Manufacturer Part Number
ATMEGA16-16AQ
Description
MCU AVR 16K FLASH 16MHZ 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA16-16AQ

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16-16AQ
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA16-16AQR
Manufacturer:
Atmel
Quantity:
10 000
Timer/Counter1
Control Register B –
TCCR1B
2466T–AVR–07/10
• Bit 7 – ICNC1: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the Noise Canceler is
activated, the input from the Input Capture Pin (ICP1) is filtered. The filter function requires four
successive equal valued samples of the ICP1 pin for changing its output. The Input Capture is
therefore delayed by four Oscillator cycles when the Noise Canceler is enabled.
• Bit 6 – ICES1: Input Capture Edge Select
This bit selects which edge on the Input Capture Pin (ICP1) that is used to trigger a capture
event. When the ICES1 bit is written to zero, a falling (negative) edge is used as trigger, and
when the ICES1 bit is written to one, a rising (positive) edge will trigger the capture.
When a capture is triggered according to the ICES1 setting, the counter value is copied into the
Input Capture Register (ICR1). The event will also set the Input Capture Flag (ICF1), and this
can be used to cause an Input Capture Interrupt, if this interrupt is enabled.
When the ICR1 is used as TOP value (see description of the WGM13:0 bits located in the
TCCR1A and the TCCR1B Register), the ICP1 is disconnected and consequently the Input Cap-
ture function is disabled.
• Bit 5 – Reserved Bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be
written to zero when TCCR1B is written.
• Bit 4:3 – WGM13:2: Waveform Generation Mode
See TCCR1A Register description.
• Bit 2:0 – CS12:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
49
Table 48. Clock Select Bit Description
Bit
Read/Write
Initial Value
CS12
and
0
0
0
0
1
1
1
1
Figure
CS11
0
0
1
1
0
0
1
1
ICNC1
50.
R/W
7
0
CS10
ICES1
0
1
0
1
0
1
0
1
R/W
6
0
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
External clock source on T1 pin. Clock on falling edge.
External clock source on T1 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
R
5
0
/1 (No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
WGM13
R/W
4
0
WGM12
R/W
3
0
CS12
R/W
2
0
CS11
R/W
1
0
ATmega16(L)
CS10
R/W
0
0
TCCR1B
Figure
113

Related parts for ATMEGA16-16AQ