PIC18F26J11-I/ML Microchip Technology, PIC18F26J11-I/ML Datasheet - Page 346
![IC PIC MCU FLASH 64K 2V 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F26J11-I/ML
Manufacturer Part Number
PIC18F26J11-I/ML
Description
IC PIC MCU FLASH 64K 2V 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
4.PIC18F26J11-ISO.pdf
(28 pages)
Specifications of PIC18F26J11-I/ML
Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180023, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F26J11-I/ML
Manufacturer:
MOLEX
Quantity:
1 001
- MA180023 PDF datasheet
- PIC18LF24J10-ISS PDF datasheet #2
- PIC18F24J11-ISS PDF datasheet #3
- PIC18F26J11-ISO PDF datasheet #4
- Current page: 346 of 528
- Download datasheet (8Mb)
PIC18F46J11 FAMILY
REGISTER 20-2:
DS39932C-page 346
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-3
bit 2-0
Note 1:
R/W-0
ADFM
If the A/D FRC clock source is selected, a delay of one T
clock starts. This allows the SLEEP instruction to be executed before starting a conversion.
ADFM: A/D Result Format Select bit
1 = Right justified
0 = Left justified
ADCAL: A/D Calibration bit
1 = Calibration is performed on next A/D conversion
0 = Normal A/D Converter operation
ACQT<2:0>: A/D Acquisition Time Select bits
111 = 20 T
110 = 16 T
101 = 12 T
100 = 8 T
011 = 6 T
010 = 4 T
001 = 2 T
000 = 0 T
ADCS<2:0>: A/D Conversion Clock Select bits
110 = F
101 = F
100 = F
011 = F
010 = F
001 = F
000 = F
ADCAL
R/W-0
ADCON1: A/D CONTROL REGISTER 1 (ACCESS FC1h)
OSC
OSC
OSC
RC
OSC
OSC
OSC
AD
AD
AD
AD
AD
AD
AD
AD
(clock derived from A/D RC oscillator)
/64
/16
/4
/32
/8
/2
W = Writable bit
‘1’ = Bit is set
ACQT2
R/W-0
ACQT1
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ACQT0
R/W-0
(1)
CY
(instruction cycle) is added before the A/D
ADCS2
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
ADCS1
R/W-0
ADCS0
R/W-0
bit 0
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