PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 400
![IC PIC MCU FLASH 16KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65J90-I/PT
Manufacturer Part Number
PIC18F65J90-I/PT
Description
IC PIC MCU FLASH 16KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F63J11-IPT.pdf
(36 pages)
3.PIC18F63J90-IPT.pdf
(416 pages)
4.PIC18F63J90-IPT.pdf
(22 pages)
5.PIC18F63J90-IPT.pdf
(4 pages)
6.PIC18F63J90-IPT.pdf
(6 pages)
7.PIC18F63J90-IPT.pdf
(6 pages)
8.PIC18F63J90-IPT.pdf
(12 pages)
9.PIC18F85J90-IPT.pdf
(411 pages)
Specifications of PIC18F65J90-I/PT
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
51
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
4
No. Of Pwm Channels
2
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
51
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65J90-I/PT
Manufacturer:
VISHAY
Quantity:
2 400
Company:
Part Number:
PIC18F65J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F65J90-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Core Features
CPFSEQ .......................................................................... 312
CPFSGT .......................................................................... 313
CPFSLT ........................................................................... 313
Crystal Oscillator/Ceramic Resonator ................................ 33
Customer Change Notification Service ............................ 407
Customer Notification Service .......................................... 407
Customer Support ............................................................ 407
D
Data Addressing Modes ..................................................... 74
Data Memory ..................................................................... 64
DAW ................................................................................. 314
DC and AC Characteristics
DC Characteristics ........................................................... 361
DCFSNZ .......................................................................... 315
DECF ............................................................................... 314
DECFSZ ........................................................................... 315
Default System Clock ......................................................... 32
Details on Individual Family Members ................................. 8
Development Support ...................................................... 345
Device Overview .................................................................. 7
Direct Addressing ............................................................... 75
E
Effect on Standard PIC18 Instructions ............................. 342
Effects of Power-Managed Modes on Various Clock Sources
Electrical Characteristics .................................................. 349
Enhanced Universal Synchronous Asynchronous Receiver
ENVREG Pin .................................................................... 290
Equations
© 2007 Microchip Technology Inc.
Easy Migration ............................................................. 7
Extended Instruction Set .............................................. 7
Memory Options ........................................................... 7
nanoWatt Technology .................................................. 7
Oscillator Options and Features .................................. 7
Comparing Addressing Modes with the Extended In-
Direct .......................................................................... 74
Indexed Literal Offset ................................................. 77
Indirect ....................................................................... 74
Inherent and Literal .................................................... 74
Access Bank .............................................................. 67
Bank Select Register (BSR) ....................................... 64
Extended Instruction Set ............................................ 77
General Purpose Registers ........................................ 67
Memory Maps
Special Function Registers ........................................ 68
Graphs and Tables .................................................. 387
Power-Down and Supply Current ............................ 352
Supply Voltage ......................................................... 351
Features (64-Pin Devices) ........................................... 9
Features (80-Pin Devices) ........................................... 9
36
Transmitter (EUSART). See EUSART.
A/D Acquisition Time ................................................ 268
A/D Minimum Charging Time ................................... 268
Calculating the Minimum Required Acquisition Time .....
LCD Static and Dynamic Current ............................. 167
struction Set Enabled ......................................... 78
BSR ................................................................... 79
Instructions Affected .......................................... 77
Mapping Access Bank ....................................... 79
PIC18FX3J90/X4J90 Devices ........................... 65
PIC18FX5J90 Devices ....................................... 66
Special Function Registers ................................ 68
268
Preliminary
PIC18F85J90 FAMILY
Errata ................................................................................... 5
EUSART
Extended Instruction Set
External Oscillator Modes .................................................. 33
F
Fail-Safe Clock Monitor ........................................... 283, 292
Fast Register Stack ........................................................... 61
Firmware Instructions ...................................................... 295
Flash Configuration Words .............................................. 283
Flash Program Memory ..................................................... 81
Asynchronous Mode ................................................ 238
Baud Rate Generator (BRG) ................................... 233
Synchronous Master Mode ...................................... 244
Synchronous Slave Mode ........................................ 247
ADDFSR .................................................................. 338
ADDULNK ............................................................... 338
CALLW .................................................................... 339
MOVSF .................................................................... 339
MOVSS .................................................................... 340
PUSHL ..................................................................... 340
SUBFSR .................................................................. 341
SUBULNK ................................................................ 341
EC Modes .................................................................. 34
HS Modes .................................................................. 33
Exiting Fail-Safe Operation ...................................... 293
Interrupts in Power-Managed Modes ...................... 293
POR or Wake-up from Sleep ................................... 293
WDT During Oscillator Failure ................................. 292
Associated Registers ................................................. 89
Control Registers ....................................................... 82
Erase Sequence ........................................................ 86
Erasing ...................................................................... 86
Operation During Code-Protect ................................. 89
Reading ..................................................................... 85
Table Pointer
Table Pointer Boundaries .......................................... 84
Table Reads and Table Writes .................................. 81
Write Sequence ......................................................... 87
Writing ....................................................................... 87
12-Bit Break Transmit and Receive ................. 243
Associated Registers, Receive ........................ 241
Associated Registers, Transmit ....................... 239
Auto-Wake-up on Sync Break ......................... 242
Receiver .......................................................... 240
Setting up 9-Bit Mode with Address Detect ..... 240
Transmitter ...................................................... 238
Associated Registers ....................................... 233
Auto-Baud Rate Detect .................................... 236
Baud Rate Error, Calculating ........................... 233
Baud Rates, Asynchronous Modes ................. 234
High Baud Rate Select (BRGH Bit) ................. 233
Operation in Power-Managed Modes .............. 233
Sampling ......................................................... 233
Associated Registers, Receive ........................ 246
Associated Registers, Transmit ....................... 245
Reception ........................................................ 246
Transmission ................................................... 244
Associated Registers, Receive ........................ 248
Associated Registers, Transmit ....................... 247
Reception ........................................................ 248
Transmission ................................................... 247
EECON1 and EECON2 ..................................... 82
TABLAT (Table Latch) Register ........................ 84
TBLPTR (Table Pointer) Register ...................... 84
Boundaries Based on Operation ....................... 84
DS39770B-page 399