PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 399

IC PIC MCU FLASH 16KX16 64TQFP

PIC18F65J90-I/PT

Manufacturer Part Number
PIC18F65J90-I/PT
Description
IC PIC MCU FLASH 16KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F65J90-I/PT

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
51
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
4
No. Of Pwm Channels
2
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
51
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F65J90-I/PT
Manufacturer:
VISHAY
Quantity:
2 400
Part Number:
PIC18F65J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F65J90-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F85J90 FAMILY
BN .................................................................................... 304
BNC .................................................................................. 305
BNN .................................................................................. 305
BNOV ............................................................................... 306
BNZ .................................................................................. 306
BOR. See Brown-out Reset.
BOV .................................................................................. 309
BRA .................................................................................. 307
Break Character (12-Bit) Transmit and Receive .............. 243
BRG. See Baud Rate Generator.
BRGH Bit
Brown-out Reset (BOR) ..................................................... 47
BSF .................................................................................. 307
BTFSC ............................................................................. 308
BTFSS .............................................................................. 308
BTG .................................................................................. 309
BZ ..................................................................................... 310
C
C Compilers
Calibration (A/D Converter) .............................................. 271
CALL ................................................................................ 310
CALLW ............................................................................. 339
Capture (CCP Module) ..................................................... 150
Capture/Compare/PWM (CCP) ........................................ 147
Clock Sources .................................................................... 31
CLRF ................................................................................ 311
DS39770B-page 398
PLL ............................................................................. 34
PWM Operation (Simplified) .................................... 153
Reads from Flash Program Memory .......................... 85
Resistor Ladder Configurations for M2 .................... 165
Resistor Ladder Configurations for M3 .................... 166
Single Comparator ................................................... 275
Table Read Operation ................................................ 81
Table Write Operation ................................................ 82
Table Writes to Flash Program Memory .................... 87
Timer0 in 16-Bit Mode .............................................. 132
Timer0 in 8-Bit Mode ................................................ 132
Timer1 (16-Bit Read/Write Mode) ............................ 136
Timer1 (8-Bit Mode) ................................................. 136
Timer2 ...................................................................... 142
Timer3 (16-Bit Read/Write Mode) ............................ 144
Timer3 (8-Bit Mode) ................................................. 144
Watchdog Timer ....................................................... 289
TXSTA1 Register ..................................................... 233
TXSTA2 Register ..................................................... 252
and On-Chip Voltage Regulator ............................... 291
Detecting .................................................................... 47
MPLAB C18 ............................................................. 346
MPLAB C30 ............................................................. 346
Associated Registers ............................................... 152
CCP Pin Configuration ............................................. 150
CCPR2H:CCPR2L Registers ................................... 150
Software Interrupt .................................................... 150
Timer1/Timer3 Mode Selection ................................ 150
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 148
CCPRxH Register .................................................... 148
CCPRxL Register ..................................................... 148
Compare Mode. See Compare.
Configuration ............................................................ 148
Interaction of CCP1 and CCP2 for Timer Resources ....
Interconnect Configurations ..................................... 148
Default System Clock on Reset ................................. 32
Selection Using OSCCON Register ........................... 32
149
Preliminary
CLRWDT ......................................................................... 311
Code Examples
Code Protection ............................................................... 283
COMF .............................................................................. 312
Comparator ...................................................................... 273
Comparator Specifications ............................................... 364
Comparator Voltage Reference ....................................... 279
Compare (CCP Module) .................................................. 151
Computed GOTO ............................................................... 61
Configuration Bits ............................................................ 283
Configuration Register Protection .................................... 294
16 x 16 Signed Multiply Routine ................................ 92
16 x 16 Unsigned Multiply Routine ............................ 92
8 x 8 Signed Multiply Routine .................................... 91
8 x 8 Unsigned Multiply Routine ................................ 91
Changing Between Capture Prescalers ................... 150
Computed GOTO Using an Offset Value ................... 61
Erasing a Flash Program Memory Row ..................... 86
Fast Register Stack ................................................... 61
How to Clear RAM (Bank 1) Using Indirect Addressing
Implementing a Real-Time Clock Using a Timer1 Inter-
Initializing PORTA .................................................... 110
Initializing PORTB .................................................... 112
Initializing PORTC ................................................... 115
Initializing PORTD ................................................... 118
Initializing PORTE .................................................... 120
Initializing PORTF .................................................... 122
Initializing PORTG ................................................... 125
Initializing PORTH ................................................... 127
Initializing PORTJ .................................................... 129
Loading the SSPBUF (SSPSR) Register ................. 188
Reading a Flash Program Memory Word .................. 85
Saving STATUS, WREG and BSR Registers in RAM ...
Writing to Flash Program Memory ............................. 88
Analog Input Connection Considerations ................ 277
Associated Registers ............................................... 277
Configuration ........................................................... 274
Effects of a Reset .................................................... 276
Interrupts ................................................................. 276
Operation ................................................................. 275
Operation During Sleep ........................................... 276
Outputs .................................................................... 275
Reference ................................................................ 275
Response Time ........................................................ 275
Accuracy and Error .................................................. 280
Associated Registers ............................................... 281
Configuring .............................................................. 279
Connection Considerations ...................................... 280
Effects of a Reset .................................................... 280
Operation During Sleep ........................................... 280
Associated Registers ............................................... 152
CCP Pin Configuration ............................................. 151
CCPR2 Register ...................................................... 151
Software Interrupt .................................................... 151
Special Event Trigger .............................. 145, 151, 270
Timer1/Timer3 Mode Selection ................................ 151
74
rupt Service ..................................................... 139
108
External Signal ................................................ 275
Internal Signal .................................................. 275
© 2007 Microchip Technology Inc.

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