PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 182
![IC PIC MCU FLASH 16KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65J90-I/PT
Manufacturer Part Number
PIC18F65J90-I/PT
Description
IC PIC MCU FLASH 16KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F63J11-IPT.pdf
(36 pages)
3.PIC18F63J90-IPT.pdf
(416 pages)
4.PIC18F63J90-IPT.pdf
(22 pages)
5.PIC18F63J90-IPT.pdf
(4 pages)
6.PIC18F63J90-IPT.pdf
(6 pages)
7.PIC18F63J90-IPT.pdf
(6 pages)
8.PIC18F63J90-IPT.pdf
(12 pages)
9.PIC18F85J90-IPT.pdf
(411 pages)
Specifications of PIC18F65J90-I/PT
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
51
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
4
No. Of Pwm Channels
2
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
51
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65J90-I/PT
Manufacturer:
VISHAY
Quantity:
2 400
Company:
Part Number:
PIC18F65J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F65J90-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F63J11-IPT PDF datasheet #2
- PIC18F63J90-IPT PDF datasheet #3
- PIC18F63J90-IPT PDF datasheet #4
- PIC18F63J90-IPT PDF datasheet #5
- PIC18F63J90-IPT PDF datasheet #6
- PIC18F63J90-IPT PDF datasheet #7
- PIC18F63J90-IPT PDF datasheet #8
- PIC18F85J90-IPT PDF datasheet #9
- Current page: 182 of 411
- Download datasheet (7Mb)
PIC18F85J90 FAMILY
15.9
The LCD timing generation provides an interrupt that
defines the LCD frame timing. This interrupt can be
used to coordinate the writing of the pixel data with the
start of a new frame. Writing pixel data at the frame
boundary allows a visually crisp transition of the image.
This interrupt can also be used to synchronize external
events to the LCD. For example, the interface to an
external segment driver can be synchronized for
segment data update to the LCD frame.
A new frame is defined to begin at the leading edge of
the COM0 common signal. The interrupt will be set
immediately after the LCD controller completes
accessing all pixel data required for a frame. This will
occur at a fixed interval before the frame boundary
(T
will begin to access data for the next frame within the
interval from the interrupt to when the controller begins
to access data after the interrupt (T
must be written within T
controller will begin to access the data for the next
frame.
FIGURE 15-17:
DS39770B-page 180
FINT
T
T
), as shown in Figure 15-17. The LCD controller
COM0
COM1
COM2
COM3
FWR
FINT
LCD Interrupts
= T
= (T
(T
FRAME
FWR
FWR
/2 – (2 T
/2 – (1 T
Boundary
/2 * (LMUX1:LMUX0 + 1) + T
Frame
EXAMPLE WAVEFORMS AND INTERRUPT TIMING
IN QUARTER DUTY CYCLE DRIVE
FWR
CY
CY
, as this is when the LCD
+ 40 ns))
+ 40 ns))
FWR
Minimum = 1.5(T
Maximum = 1.5(T
). New data
CY
/2
Preliminary
2 Frames
FRAME
FRAME
Boundary
Frame
/4) – (2 T
/4) – (1 T
When the LCD driver is running with Type-B wave-
forms, and the LMUX1:LMUX0 bits are not equal to
‘00’, there are some additional issues that must be
addressed. Since the DC voltage on the pixel takes two
frames to maintain zero volts, the pixel data must not
change between subsequent frames. If the pixel data
were allowed to change, the waveform for the odd
frames would not necessarily be the complement of the
waveform generated in the even frames and a DC
component would be introduced into the panel. There-
fore, when using Type-B waveforms, the user must
synchronize the LCD pixel updates to occur within a
subframe after the frame interrupt.
To correctly sequence writing while in Type-B, the
interrupt will only occur on complete phase intervals. If
the user attempts to write when the write is disabled,
the WERR (LCDCON<5>) bit is set.
Note:
CY
CY
LCD
Interrupt
Occurs
+ 40 ns)
+ 40 ns)
The interrupt is not generated when the
Type-A waveform is selected and when the
Type-B with no multiplex (static) is
selected.
T
FWR
T
FINT
© 2007 Microchip Technology Inc.
Controller Accesses
Next Frame Data
Boundary
Frame
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
3
2
1
0
3
2
1
0
3
2
1
0
3
2
1
0
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