DSPIC30F2010-20E/SP Microchip Technology, DSPIC30F2010-20E/SP Datasheet - Page 73
![IC DSPIC MCU/DSP 12K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC30F2010-20E/SP
Manufacturer Part Number
DSPIC30F2010-20E/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20IP.pdf
(26 pages)
2.DSPIC30F2010-20ISO.pdf
(202 pages)
3.DSPIC30F2010-20ISO.pdf
(6 pages)
4.DSPIC30F2010-20ISO.pdf
(26 pages)
5.DSPIC30F2010-20ESP.pdf
(203 pages)
Specifications of DSPIC30F2010-20E/SP
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2010-20E/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- DSPIC30F2011-20IP PDF datasheet
- DSPIC30F2010-20ISO PDF datasheet #2
- DSPIC30F2010-20ISO PDF datasheet #3
- DSPIC30F2010-20ISO PDF datasheet #4
- DSPIC30F2010-20ESP PDF datasheet #5
- Current page: 73 of 203
- Download datasheet (3Mb)
12.0
This section describes the Output Compare module
and associated operational modes. The features pro-
vided by this module are useful in applications requiring
operational modes such as:
• Generation of Variable Width Output Pulses
• Power Factor Correction
Figure 12-1 depicts a block diagram of the Output
Compare module.
FIGURE 12-1:
© 2006 Microchip Technology Inc.
From General Purpose
Timer Module
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046).
Note:
OUTPUT COMPARE MODULE
Where ‘x’ is shown, reference is made to the registers associated with the respective output compare
channels 1and 2.
TMR2<15:0>
OUTPUT COMPARE MODE BLOCK DIAGRAM
0
Comparator
OCxRS
OCxR
TMR3<15:0>
1
OCTSEL
T2P2_MATCH
0
The key operational features of the Output Compare
module include:
• Timer2 and Timer3 Selection mode
• Simple Output Compare Match mode
• Dual Output Compare Match mode
• Simple PWM mode
• Output Compare during Sleep and Idle modes
• Interrupt on Output Compare/PWM Event
These operating modes are determined by setting
the appropriate bits in the 16-bit OCxCON SFR (where
x = 1 and 2).
OCxRS and OCxR in the figure represent the Dual
Compare registers. In the Dual Compare mode, the
OCxR register is used for the first compare and OCxRS
is used for the second compare.
T3P3_MATCH
Mode Select
OCM<2:0>
1
Output
Logic
3
Set Flag bit
OCxIF
dsPIC30F2010
R
S
Q
Output Enable
(for x = 1 and 2)
DS70118G-page 71
OCx
OCFA
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