PIC16CE625-04E/SS Microchip Technology, PIC16CE625-04E/SS Datasheet - Page 50

IC MCU OTP 2KX14 EE COMP 20SSOP

PIC16CE625-04E/SS

Manufacturer Part Number
PIC16CE625-04E/SS
Description
IC MCU OTP 2KX14 EE COMP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16CE625-04E/SS

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
For Use With
309-1016 - ADAPTER 20-SSOP TO 18-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
PIC16CE62X
10.1
The configuration bits can be programmed (read as ’0’)
or left unprogrammed (read as ’1’) to select various
device configurations. These bits are mapped in
program memory location 2007h.
REGISTER 10-1: CONFIGURATION WORD
DS40182C-page 50
bit13
bit 13-8,
bit 7:
bit 6:
bit 3:
bit 2:
bit 1-0:
Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the value of bit PWRTE.
CP1
5-4:
2: All of the CP<1:0> pairs have to be given the same value to enable the code protection scheme listed.
CP0
Configuration Bits
CP1:CP0 Pairs: Code protection bit pairs
Code protection for 2K program memory
11 = Program memory code protection off
10 = 0400h-07FFh code protected
01 = 0200h-07FFh code protected
00 = 0000h-07FFh code protected
Code protection for 1K program memory
11 = Program memory code protection off
10 =Program memory code protection on
01 = 0200h-03FFh code protected
00 = 0000h-03FFh code protected
Code protection for 0.5K program memory
11 = Program memory code protection off
10 = Program memory code protection off
01 = Program memory code protection off
00 = 0000h-01FFh code protected
Unimplemented: Read as ’1’
BODEN: Brown-out Reset Enable bit
1 = BOD enabled
0 = BOD disabled
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC1:FOSC0: Oscillator Selection bits
11 = RC oscillator
10 = HS oscillator
01 = XT oscillator
00 = LP oscillator
Ensure the Power-up Timer is enabled anytime Brown-out Reset is enabled.
(2)
CP1
CP0
(2)
CP1
CP0
(2)
— BODEN
(1)
(1)
(2)
(1)
CP1
CP0
(2)
The user will note that address 2007h is beyond
the user program memory space. In fact, it belongs
to the special test/configuration
(2000h – 3FFFh), which can be accessed only during
programming.
PWRTE
(1)
WDTE F0SC1
F0SC0
1999 Microchip Technology Inc.
bit0
CONFIG
REGISTER:
memory
Address
2007h
space

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