PIC16CE625-04I/SO Microchip Technology, PIC16CE625-04I/SO Datasheet
PIC16CE625-04I/SO
Specifications of PIC16CE625-04I/SO
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PIC16CE625-04I/SO Summary of contents
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... OTP 8-Bit CMOS MCU with EEPROM Data Memory Devices included in this data sheet: • PIC16CE623 • PIC16CE624 • PIC16CE625 High Performance RISC CPU: • Only 35 instructions to learn • All single-cycle instructions (200 ns), except for program branches which are two-cycle • Operating speed: ...
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... However, we realize that we may have missed a few things. If you find any information that is missing or appears in error, please: • Fill out and mail in the reader response form in the back of this data sheet. • E-mail us at webmaster@microchip.com. We appreciate your assistance in making this a better document. DS40182C-page 2 To Our Valued Customers 1999 Microchip Technology Inc. ...
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... The PIC16CE623 and PIC16CE624 have 96 bytes of RAM. The PIC16CE625 has 128 bytes of RAM. Each microcontroller contains a 128x8 EEPROM memory array for storing non-volatile information, such as cali- bration data or security codes. This memory has an endurance of 1,000,000 erase/write cycles and a reten- tion of 40 plus years ...
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... TMR0 TMR0 2 2 Yes Yes 2.5-5.5 2.5-5.5 Yes Yes 18-pin DIP, 18-pin DIP, SOIC; SOIC; 20-pin SSOP 20-pin SSOP 1999 Microchip Technology Inc. PIC16CE625 20 2K 128 128 TMR0 2 Yes 4 13 2.5-5.5 Yes 18-pin DIP, SOIC; 20-pin SSOP ...
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... The devices are identical to the OTP devices but with all EPROM locations and configuration options already programmed by the factory. Certain code and prototype verification production shipments are available. Please contact your Microchip Technology sales office for more details. 2.4 Serialized Quick-Turn-Programming erased and (SQTP ...
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... PIC16CE62X NOTES: DS40182C-page 6 1999 Microchip Technology Inc. ...
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... Memory PIC16CE623 512x14 96x8 PIC16CE624 1Kx14 96x8 PIC16CE625 2Kx14 128x8 The PIC16CE62X can directly or indirectly address its register files or data memory. All special function registers including the program counter are mapped in the data memory. The PIC16CE62X family has an orthogonal (symmetrical) instruction set that makes it possible to carry out any operation on any register using any addressing mode ...
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... PIC16CE62X FIGURE 3-1: BLOCK DIAGRAM Data Memory Device Program Memory PIC16CE623 512 PIC16CE624 PIC16CE625 128 Program Counter EPROM Program 8 Level Stack Memory (13-bit) Program 14 Bus Instruction reg Direct Addr Power-up Timer Instruction Oscillator Decode & Start-up Timer Control Power-on Reset Timing ...
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... O = output — = Not used TTL = TTL input Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt. Note 2: This buffer is a Schmitt Trigger input when used in serial programming mode. 1999 Microchip Technology Inc. Buffer Description Type I ST/CMOS Oscillator crystal input/external clock source input. ...
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... Q2, Q3, and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write PC+1 Fetch INST (PC+1) Execute INST (PC) Execute 1 Fetch 2 Execute 2 Fetch 3 Execute 3 Fetch Internal phase clock PC+2 Fetch INST (PC+2) Execute INST (PC+1) Flush Fetch SUB_1 Execute SUB_1 1999 Microchip Technology Inc. ...
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... PIC16CE625 are physically implemented. Accessing a location above these boundaries will cause a wrap-around within the first 512 x 14 space (PIC16CE623 space (PIC16CE624 space (PIC16CE625). The reset vector is at 0000h and the interrupt vector is at 0004h (Figure 4-1, Figure 4-2, Figure 4-3). FIGURE 4-1: ...
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... RAM. DS40182C-page 12 4.2.1 GENERAL PURPOSE REGISTER FILE The register file is organized the PIC16CE623/624 and 128 the PIC16CE625. Each is accessed either directly or indirectly through the File Select Register FSR (Section 4.4). F0h-FFh 1999 Microchip Technology Inc. ...
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... Purpose Register Accesses 70h-7Fh 7Fh Bank 0 Bank 1 Unimplemented data memory locations, read as ’0’. Note 1: Not a physical register. 1999 Microchip Technology Inc. FIGURE 4-5: DATA MEMORY MAP FOR THE PIC16CE625 File File Address Address 80h 00h INDF 81h 01h TMR0 82h ...
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... TRISB0 1111 1111 1111 1111 — — — — — — ---0 0000 ---0 0000 RBIF 0000 000x 0000 000u — -0-- ---- -0-- ---- — — BOD ---- --0x ---- --uq — — EEV ---- -111 ---- -111 DD VR0 000- 0000 000- 0000 1999 Microchip Technology Inc. ...
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... Note: For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. 1999 Microchip Technology Inc recommended, therefore, that only BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS register, because these instructions do not affect any status bit ...
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... Note: To achieve a 1:1 prescaler assignment for TMR0, assign the prescaler to the WDT (PSA = 1). R/W-1 R/W-1 R/W-1 R/W-1 PSA PS2 PS1 PS0 128 R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR reset -x = Unknown at POR reset 1999 Microchip Technology Inc. ...
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... RBIF: RB Port Change Interrupt Flag bit 1 = When at least one of the RB<7:4> pins changed state (must be cleared in software None of the RB<7:4> pins have changed state 1999 Microchip Technology Inc. Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... U-0 U-0 — — — — bit0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset -x = Unknown at POR reset R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset -x = Unknown at POR reset 1999 Microchip Technology Inc. ...
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... No Power-on Reset occurred Power-on Reset occurred (must be set in software after a Power-on Reset occurs) bit 0: BOD: Brown-out Reset Status bit Brown-out Reset occurred Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs) 1999 Microchip Technology Inc. has in the U-0 U-0 R/W-0 R/W-0 — ...
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... PCL as conditions. Destination Note 2: There are no instruction/mnemonics ALU result called PUSH or POP. These are actions that occur from the execution of the CALL, RETURN, RETLW and RETFIE instructions or the vectoring to an interrupt address. GOTO, CALL Opcode <10:0> 1999 Microchip Technology Inc. ...
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... Bank 0 For memory map detail see Figure 4-4 and Figure 4-5. Note 1: The RP1 and IRP bits are reserved; always maintain these bits clear. 1999 Microchip Technology Inc. A simple program to clear RAM location 20h-2Fh using indirect addressing is shown in Example 4-1. EXAMPLE 4-1: ...
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... PIC16CE62X NOTES: DS40182C-page 22 1999 Microchip Technology Inc. ...
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... Input Buffer RD TRISA PORTA To Comparator 1999 Microchip Technology Inc. Note: On reset, the TRISA register is set to all inputs. The digital inputs are disabled and the comparator inputs are forced to ground to reduce excess current consumption. TRISA controls the direction of the RA pins, even when they are being used as comparator inputs ...
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... Comparator Output WR PORTA CK Q Data Latch TRISA CK Q TRIS Latch RD TRISA RD PORTA TMR0 Clock Input DS40182C-page 24 Comparator Mode = 110 Comparator Mode = 110 RA3 Pin Analog Input Mode Schmitt Trigger Input Buffer RA4 Pin Schmitt Trigger Input Buffer 1999 Microchip Technology Inc. ...
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... VRCON VREN VROE Legend: — = Unimplemented locations, read as ‘0’ unknown unchanged Note: Shaded bits are not used by PORTA. 1999 Microchip Technology Inc. Function Input/output or comparator input Input/output or comparator input Input/output or comparator input or V Input/output or comparator input/output Input/output or external clock input for TMR0 or comparator output. ...
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... Data Bus PORTB I/O pin (1) WR TRISB ST Buffer RB0/INT Note 1: TRISB = 1 enables weak pull-up if RBPU = ’0’ (OPTION<7>). RD Port BLOCK DIAGRAM OF RB<3:0> PINS weak I/O pin Data Latch pull- TTL Input CK Buffer RD TRISB PORTB ST RD Port Buffer 1999 Microchip Technology Inc. ...
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... OPTION RBPU INTEDG Legend unchanged unknown Note: Shaded bits are not used by PORTB. 1999 Microchip Technology Inc. Function Input/output or external interrupt input. Internal software programmable weak pull-up. Input/output pin. Internal software programmable weak pull-up. Input/output pin. Internal software programmable weak pull-up. ...
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... Note: This example shows write to PORTB followed by a read from PORTB. Note that: data setup time = (0. where T = instruction cycle and propagation delay of Q1 cycle PD to output valid. Therefore, at higher clock frequencies, a write followed by a read may be problematic. 1999 Microchip Technology Inc. ...
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... EEPROM (all pins are tri-stated and the EEPROM is powered down) DD Note: EESDA, EESCL and EEV DD 1999 Microchip Technology Inc. The code for these functions is available on our web site (www.microchip.com). The code will be accessed by either including the source code FL62XINC.ASM or by linking FLASH62X.ASM. FLASH62.IMC provides external definition to the calling program ...
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... The processor must signal an end of data to the EEPROM by not generating an acknowledge bit on the last byte that has been clocked out of the EEPROM. In this case, the EEPROM must leave the data line HIGH to enable the processor to generate the STOP condition (Figure 6-2). 1999 Microchip Technology Inc. Of ...
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... The bus is monitored for its cor- responding EEPROM address all the time. It generates an acknowledge bit if the EEPROM address was true and it is not in a programming mode. 1999 Microchip Technology Inc. (C) (D) ADDRESS OR DATA ...
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... See Figure 6-4 for flow diagram. FIGURE 6-4: WORD ADDRESS ACKNOWLEDGE POLLING FLOW Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control Byte with R Did EEPROM NO Acknowledge (ACK = 0)? YES Next Operation S T DATA 1999 Microchip Technology Inc. ...
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... R/W bit set to a one. The EEPROM will then issue an acknowledge and trans- mits the eight bit data word. The processor will not acknowledge the transfer, but does generate a stop condition and the EEPROM discontinues transmission (Figure 6-8). 1999 Microchip Technology Inc. WORD ADDRESS (n) DATAn DATAn + 1 A ...
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... S T CONTROL BUS ACTIVITY A BYTE PROCESSOR SDA LINE BUS ACTIVITY FIGURE 6-9: SEQUENTIAL READ CONTROL BUS ACTIVITY BYTE PROCESSOR SDA LINE A C BUS ACTIVITY DATAn K DS40182C-page 34 CONTROL BYTE DATAn WORD CONTROL A ADDRESS (n) BYTE DATAn + 1 DATAn + DATAn DATAn + 1999 Microchip Technology Inc. ...
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... TMR0 T0 T0+1 Instruction Executed 1999 Microchip Technology Inc. bit (OPTION<4>). Clearing the T0SE bit selects the rising edge. Restrictions on the external clock input are discussed in detail in Section 7.2. The prescaler is shared between the Timer0 module and the Watchdog Timer. The prescaler assignment is controlled in software by the control bit PSA (OPTION< ...
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... Interrupt Latency Time Inst (PC+1) Dummy cycle Dummy cycle Inst (PC) , where T = instruction cycle time PC+5 PC+6 MOVF TMR0,W NT0+1 Read TMR0 Read TMR0 reads NT0 reads NT0 + 02h 0004h 0005h Inst (0004h) Inst (0005h) Inst (0004h) 1999 Microchip Technology Inc. ...
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... Therefore, the error in measuring the interval between two edges on Timer0 input = ±4T 2: External clock if no prescaler selected; prescaler output otherwise. 3: The arrows indicate the points in time where sampling occurs. 1999 Microchip Technology Inc. When a prescaler is used, the external clock input is divided by the asynchronous ripple-counter type prescaler so that the prescaler output is symmetrical ...
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... WDT, a CLRWDT instruction will clear the prescaler along with the Watchdog Timer. The prescaler is not readable or writable SYNC Cycles PSA 8-bit Prescaler 8 8-to-1MUX PS<2:0> PSA WDT Time-out Data Bus 8 TMR0 reg Set flag bit T0IF on Overflow 1999 Microchip Technology Inc. ...
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... Legend: — = Unimplemented locations, read as ‘0’ unknown unchanged. Note: Shaded bits are not used by TMR0 module. 1999 Microchip Technology Inc. To change prescaler from the WDT to the TMR0 module, use the sequence shown in Example 7-2. This precaution must be taken even if the WDT is disabled. ...
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... PIC16CE62X NOTES: DS40182C-page 40 1999 Microchip Technology Inc. ...
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... RA0 – connects to RA1 IN bit 2-0: CM<2:0>: Comparator mode Figure 8-1. 1999 Microchip Technology Inc. The CMCON register, shown in Register 8-1, controls the comparator input and output multiplexers. A block two analog diagram of the comparator is shown in Figure 8-1. R/W-0 R/W-0 ...
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... CM<2:0> = 101 Three Inputs Multiplexed to Two Comparators Off (Read as ’0’ Off (Read as ’0’ CM<2:0> = 111 CIS CIS=1 C1OUT CIS CIS=1 C2OUT From V Module REF CM<2:0> = 010 C1OUT C2OUT CM<2:0> = 110 CIS CIS=1 C1OUT C2OUT CM<2:0> = 001 1999 Microchip Technology Inc. ...
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... The shaded areas of the output of the comparator in Figure 8-2 represent the uncertainty due to input offsets and response time. 1999 Microchip Technology Inc. 8.3 Comparator Reference An external or internal reference signal may be used depending on the comparator operating mode. The ...
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... Schmitt Trigger input specification. 2: Analog levels on any pin that is defined as a digital input may cause the input buffer to consume more current than is specified. MULTIPLEX CMCON From Other EN Comparator CL RD CMCON NRESET Port Pins + - 1999 Microchip Technology Inc. ...
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... LEAKAGE 1999 Microchip Technology Inc. wake-up the device from SLEEP mode when enabled. While the comparator is powered-up, higher sleep currents than shown in the power down current specification will occur. Each comparator that is operational will consume additional current as shown in the comparator specifications. To minimize power consumption while in SLEEP mode, turn off the comparators, CM< ...
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... TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 ---1 1111 ---1 1111 Value on Value on: Bit 0 All Other POR Resets CM0 00-- 0000 00-- 0000 VR0 000- 0000 000- 0000 RBIF 0000 000x 0000 000u — -0-- ---- -0-- ---- — -0-- ---- -0-- ---- 1999 Microchip Technology Inc. ...
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... VOLTAGE REFERENCE BLOCK DIAGRAM V REN 8R V REF Note defined in Table 13-2. 1999 Microchip Technology Inc. 9.1 Configuring the Voltage Reference The Voltage Reference can output 16 distinct voltage levels for each range. The equations used to calculate the output of the Voltage Reference are as follows ...
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... REF Reference Module operates bit, ROE enabled will also increase REF shows an example buffering V Output REF Value On Value On Bit 0 All Other POR / BOD Resets VR0 000- 0000 000- 0000 CM0 00-- 0000 00-- 0000 TRISA0 ---1 1111 ---1 1111 1999 Microchip Technology Inc. ...
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... Code protection 7. ID Locations 8. In-circuit serial programming 1999 Microchip Technology Inc. PIC16CE62X The PIC16CE62X has a Watchdog Timer which is controlled by configuration bits. It runs off its own RC oscillator for added reliability. There are two timers that offer necessary delays on power-up. One is the Oscillator Start-up Timer (OST), intended to keep the chip in reset until the crystal oscillator is stable ...
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... The user will note that address 2007h is beyond the user program memory space. In fact, it belongs to the special test/configuration (2000h – 3FFFh), which can be accessed only during programming. (1) (2) (1) — BODEN CP1 CP0 PWRTE WDTE F0SC1 (2) (1) (1) memory space F0SC0 CONFIG Address REGISTER: 2007h bit0 1999 Microchip Technology Inc. ...
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... A series resistor may be required for AT strip cut crystals. FIGURE 10-2: EXTERNAL CLOCK INPUT OPERATION (HS OSC CONFIGURATION) Clock From OSC1 ext. system PIC16CE62X Open OSC2 1999 Microchip Technology Inc. PIC16CE62X TABLE 10-1: CERAMIC RESONATORS, PIC16CE62X Ranges Tested: Mode Freq OSC1 XT 455 kHz 68 - 100 pF 2 ...
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... OSC2/CLKOUT pin and can be used for test pur- poses or to synchronize other logic (Figure 3-2 for waveform). FIGURE 10-5: RC OSCILLATOR MODE V DD Rext Cext PIC16CE62X CLK variation. Furthermore, the and 100 k . values. DD PIC16CE62X OSC1 Internal Clock OSC2/CLKOUT /4 OSC 1999 Microchip Technology Inc. ...
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... On-chip 10-bit Ripple-counter RC OSC Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin. 1999 Microchip Technology Inc. PIC16CE62X state” on Power-on reset, MCLR reset, WDT reset and MCLR reset during SLEEP. They are not affected by a WDT wake-up, since this is viewed as the resumption of normal operation ...
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... The Power-up Timer should always be enabled when Brown-out Reset is enabled. Figure 10-7 shows typical Brown-out situations < falls below 4.0V (refer falls below 4.0V for less than DD rises above while the Power-up Timer the Power-Up Timer will execute 1999 Microchip Technology Inc. ...
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... Legend unknown unchanged 1999 Microchip Technology Inc. 10.4.6 POWER CONTROL (PCON)/STATUS REGISTER The power control/status register, PCON (address 8Eh) has two bits. Bit0 is BOR (Brown-out). BOR is unknown on power-on-reset. It must then be set by the user and checked on subsequent resets to see if BOR = 0 time-out indicating that a brown-out has occurred. The BOR status bit is a don’ ...
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... Wake-up from SLEEP through interrupt • Wake-up from SLEEP through WDT time-out uuuu uuuu - uuuu uuuu ( (4) uuuq quuu uuuu uuuu ---u uuuu uuuu uuuu uu-- uuuu ---u uuuu (2) uuuu uqqq (2,5) -q-- ---- uuuu uuuu ---u uuuu uuuu uuuu -u-- ---- ---- --uu ---- -111 uuu- uuuu 1999 Microchip Technology Inc. ...
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... FIGURE 10-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 10-10: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET 1999 Microchip Technology Inc. PIC16CE62X T PWRT T OST T PWRT T OST ) DD T PWRT T OST ...
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... MCP8XX and MCP1XX families of supervisors provide push-pull and open collector outputs with both high and DD low active reset pins. There are 7 different trip point selections to accommodate 5V and 3V systems MCLR 40k PIC16CE62X is below a certain level such that 0 MCLR PIC16CE62X 1999 Microchip Technology Inc. ...
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... RBIE CMIF CMIE PEIE GIE 1999 Microchip Technology Inc. the interrupt can be determined by polling the interrupt flag bits. The interrupt flag bit(s) must be cleared in soft- ware before re-enabling interrupts to avoid RB0/INT recursive interrupts. For external interrupt events, such as the INT pin or PORTB change interrupt, the interrupt latency will be three or four instruction cycles ...
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... COMPARATOR INTERRUPT See Section 8.6 for complete description of comparator interrupts. T0IE Interrupt Latency 2 PC+1 PC+1 Inst (PC+1) — Inst (0004h) Dummy Cycle Dummy Cycle Inst (PC) = instruction cycle time 0004h 0005h Inst (0005h) Inst (0004h) 1999 Microchip Technology Inc. ...
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... W into STATUS register SWAPF W_TEMP,F ;swap W_TEMP SWAPF W_TEMP,W ;swap W_TEMP into W 1999 Microchip Technology Inc. PIC16CE62X 10.7 Watchdog Timer (WDT) The Watchdog Timer is a free running on-chip RC oscil- lator which does not require any external components. This RC oscillator is separate from the RC oscillator of the CLKIN pin ...
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... Shaded cells are not used by the Watchdog Timer. DS40182C-page Postscaler 1 U • MUX PSA • MUX WDT Time-out Bit 6 Bit 5 Bit 4 Bit 3 BOREN CP1 CP0 PWRTE INTEDG T0CS T0SE PSA 8 PS<2:0> To TMR0 (Figure 7-6) PSA Bit 2 Bit 1 Bit 0 WDTE FOSC1 FOSC0 PS2 PS1 PS0 1999 Microchip Technology Inc. ...
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... GIE = ’1’ assumed. In this case after wake- up, the processor jumps to the interrupt routine. If GIE = ’0’, execution will continue in-line. 4: CLKOUT is not available in these osc modes, but shown here for timing reference. 1999 Microchip Technology Inc. The first event will cause a device reset. The two latter events are considered a continuation of program exe- cution ...
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... A typical in-circuit serial programming connection is shown in Figure 10-20. FIGURE 10-20: TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION External Connector Signals + CLK Data I/O To Normal Connections to V (see programming IL IHH please refer to the To Normal Connections PIC16CE62X MCLR/V PP RB6 RB7 V DD 1999 Microchip Technology Inc. ...
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... Assigned to < > Register bit field In the set of i talics User defined term (font is courier) 1999 Microchip Technology Inc. PIC16CE62X The instruction set is highly orthogonal and is grouped into three basic categories: • Byte-oriented operations • Bit-oriented operations • Literal and control operations ...
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... TO 00 0000 0110 0011 , 1 C,DC,Z 11 110x kkkk kkkk 1010 kkkk kkkk 1999 Microchip Technology Inc. Notes 1,2 1,2 2 1,2 1,2 1,2,3 1,2 1,2,3 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1 ...
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... Words: 1 Cycles: 1 Example ADDWF FSR, 0 Before Instruction W = 0x17 FSR = 0xC2 After Instruction W = 0xD9 FSR = 0xC2 1999 Microchip Technology Inc. ANDLW k Syntax: Operands: Operation: Status Affected: Encoding: kkkk kkkk Description: . Words: Cycles: Example ANDWF f,d Syntax: Operands: Operation: ...
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... Words: 1 Cycles: 1(2) Example Before Instruction After Instruction ffff 7 f 127 10bb bfff ffff . HERE BTFSC FLAG,1 FALSE GOTO PROCESS_CODE TRUE • • • address HERE if FLAG<1> address TRUE if FLAG<1>= address FALSE 1999 Microchip Technology Inc. ...
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... PCLATH. CALL is a two-cycle instruc- tion. Words: 1 Cycles: 2 Example HERE CALL THERE Before Instruction PC = Address HERE After Instruction PC = Address THERE TOS = Address HERE+1 1999 Microchip Technology Inc. CLRF Syntax: Operands: Operation: Status Affected: Encoding: bfff ffff Description: Words: Cycles: Example CLRW Syntax: ...
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... If the result is 0, the next instruction, which is already fetched, is discarded. A NOP is executed instead making it a two-cycle instruction. 1 1(2) HERE DECFSZ CNT, 1 GOTO LOOP CONTINUE • • • Before Instruction address PC = HERE After Instruction CNT = CNT - 1 if CNT = address CONTINUE if CNT address HERE+1 1999 Microchip Technology Inc. ...
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... Words: 1 Cycles: 1 Example INCF CNT, 1 Before Instruction CNT = Z = After Instruction CNT = Z = 1999 Microchip Technology Inc. INCFSZ Syntax: Operands: Operation: Status Affected: Encoding: kkkk Description: Words: Cycles: Example IORLW Syntax: Operands: Operation: Status Affected: ffff Encoding: ...
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... Z is affected MOVF FSR, 0 After Instruction W = value in FSR register Move label ] MOVWF 127 (W) (f) None 00 0000 1fff ffff Move data from W register to register 'f MOVWF OPTION Before Instruction OPTION = 0xFF W = 0x4F After Instruction OPTION = 0x4F W = 0x4F 1999 Microchip Technology Inc. ...
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... PIC16C5X products. Since OPTION is a readable/writable register, the user can directly address it. Words: 1 Cycles: 1 Example To maintain upward compatibility with future PICmicro not use this instruction. 1999 Microchip Technology Inc. RETFIE Syntax: Operands: Operation: Status Affected: 0000 Encoding: Description: Words: Cycles: Example ...
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... PD TO 0000 0110 0011 The power-down status bit cleared. Time-out status bit set. Watchdog Timer and its prescaler are cleared. The processor is put into SLEEP mode with the oscillator stopped. See Section 10.8 for more details SLEEP 1999 Microchip Technology Inc. ...
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... result is zero Example 3: Before Instruction After Instruction W = 0xFF result is nega- tive 1999 Microchip Technology Inc. PIC16CE62X SUBWF Subtract W from f Syntax: [ label ] Operands [0,1] Operation: (f) - (W) Status C, DC, Z Affected: kkkk Encoding: 00 Description: Subtract (2’s complement method) W register from register 'f the result is stored in the W register the result is stored back in register 'f' ...
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... Z 00 0110 dfff ffff Exclusive OR the contents of the W register with register 'f the result is stored in the W register the result is stored back in reg- ister 'f XORWF REG 1 Before Instruction REG = 0xAF W = 0xB5 After Instruction REG = 0x1A W = 0xB5 1999 Microchip Technology Inc. ...
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... A full featured editor • A project manager • Customizable tool bar and key mapping • A status bar • On-line help 1999 Microchip Technology Inc. PIC16CE62X MPLAB allows you to: • Edit your source files (either assembly or ‘C’) • One touch assemble (or compile) and download ...
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... PICmicro MCU. 12.7 PICMASTER/PICMASTER CE The PICMASTER system from Microchip Technology is a full-featured, professional quality emulator system. This flexible in-circuit emulator provides a high-quality, universal platform for emulating Microchip 8-bit PICmicro microcontrollers (MCUs). PICMASTER sys- tems are sold worldwide, with a CE compliant model available for European Union (EU) countries ...
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... SIMICE is an entry-level hardware development sys- tem designed to operate in a PC-based environment with Microchip’s simulator MPLAB-SIM. Both SIMICE and MPLAB-SIM run under Microchip Technology’s MPLAB Integrated Development Environment (IDE) software. Specifically, SIMICE provides hardware sim- ulation for Microchip’s PIC12C5XX, PIC12CE5XX, and PIC16C5X families of PICmicro 8-bit microcontrollers ...
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... Programming Tools K L evaluation and programming tools support EE OQ Microchips HCS Secure Data Products. The HCS eval- uation kit includes an LCD display to show changing codes, a decoder to decode transmissions, and a pro- gramming interface to program test transmitters. DS40182C-page 80 PIC17C756, 1999 Microchip Technology Inc. ...
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... PIC16C6X á á á á PIC16C5X á á á á PIC14000 á á á á PIC12CXXX Tools Software Emulators 1999 Microchip Technology Inc. á á á á á á á á á á á á á á á á á á ...
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... PIC16CE62X NOTES: DS40182C-page 82 1999 Microchip Technology Inc. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1999 Microchip Technology Inc. (except V and MCLR)........................................................-0. ...
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... Note 1: The shaded region indicates the permissible combinations of voltage and frequency. 2: The maximum rated speed of the part limits the permissible combinations of voltage and frequency. Please reference the Product Identification System section for the maximum rated speed of the parts. DS40182C-page Frequency (MHz Frequency (MHz +125 1999 Microchip Technology Inc. ...
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... Note 1: The shaded region indicates the permissible combinations of voltage and frequency. 2: The maximum rated speed of the part limits the permissible combinations of voltage and frequency. Please reference the Product Identification System section for the maximum rated speed of the parts. 1999 Microchip Technology Inc ...
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... All temperatures 0 – 20 MHz All temperatures , +85 C for industrial and A T +70 C for commercial and A T +125 C for extended A Conditions = 5.5V, WDT disabled 3.0V, WDT disabled 3.0V, WDT disabled 4.5V, WDT disabled 5.5V, WDT disabled 3.0V, WDT disabled 5. 1999 Microchip Technology Inc. ...
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... The current is the additional current consumed when this peripheral is enabled. This current should be added to the base measurement Commercial temperature range only. 1999 Microchip Technology Inc. PIC16LCE62X-04 (Commercial, Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature – –40 C Min Typ† ...
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... V =4.5V, - =7.0 mA, V =4.5V, +125 =1.6 mA, V =4.5V, - =1.2 mA, V =4.5V, +125 =-3.0 mA, V =4.5V, - =-2.5 mA, V =4.5V, +125 =-1.3 mA, V =4.5V, - =-1.0 mA, V =4.5V, +125 RA4 pin clock used to drive OSC1. 1999 Microchip Technology Inc. ...
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... Characteristics No. D310 Resolution D311 Absolute Accuracy D312 Unit Resistor Value (R) 310 (1) Settling Time * These parameters are characterized but not tested. Note 1: Settling time measured while V RR 1999 Microchip Technology Inc. Sym Min Typ V 5.0 IOFF V 0 ICM CMRR +55* T 150* RESP ...
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... Uppercase letters and their meanings Fall H High I Invalid (Hi-impedance) L Low FIGURE 13-4: LOAD CONDITIONS Load condition 1 V Pin R = 464 for all pins except OSC2 for OSC2 output DS40182C-page 90 T Time osc OSC1 t0 T0CKI P Period R Rise V Valid Z Hi-Impedance Load condition Pin 1999 Microchip Technology Inc. ...
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... Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current con- sumption. All devices are tested to operate at "min." values with an external clock applied to the OSC1 pin. When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices. 1999 Microchip Technology Inc ...
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... Min Typ† Max Units — 75 200 ns — 200 — 35 100 ns — 35 100 ns — — Tosc +200 ns — — — — ns — 50 150 ns 100 — — — — ns — — — — — — 1999 Microchip Technology Inc. ...
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... IOZ 35 T Brown-out Reset Pulse Width BOR * These parameters are characterized but not tested. † Data in "Typ" column is at 5.0V unless otherwise stated. These parameters are for design guidance only and are not tested. 1999 Microchip Technology Inc. PIC16CE62X Min Typ† ...
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... Data in "Typ" column is at 5.0V unless otherwise stated. These parameters are for design guidance only and are not tested. DS40182C-page Min Typ† Max No Prescaler 0 20* — — CY With Prescaler 10* — — No Prescaler 0 20* — — CY With Prescaler 10* — — 40* — — Units Conditions prescale value ( ..., 256) 1999 Microchip Technology Inc. ...
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... HYS pression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application, please consult the Total Endurance Model which can be obtained on our website. 1999 Microchip Technology Inc. T HIGH T ...
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... PIC16CE62X NOTES: DS40182C-page 96 1999 Microchip Technology Inc. ...
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... Shoulder to Shoulder Width Ceramic Pkg. Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Window Width Window Length *Controlling Parameter JEDEC Equivalent: MO-036 Drawing No. C04-010 1999 Microchip Technology Inc Units INCHES* MIN NOM ...
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... MILLIMETERS NOM MAX 18 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 22.61 22.80 22.99 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 0.36 0.46 0.56 7.87 9.40 10. 1999 Microchip Technology Inc. ...
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... Mold Draft Angle Top Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-150 Drawing No. C04-072 1999 Microchip Technology Inc Units INCHES* ...
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... B .014 .017 .020 MILLIMETERS NOM MAX 18 1.27 2.36 2.50 2.64 2.24 2.31 2.39 0.10 0.20 0.30 10.01 10.34 10.67 7.39 7.49 7.59 11.33 11.53 11.73 0.25 0.50 0.74 0.41 0.84 1. 0.23 0.27 0.30 0.36 0.42 0. 1999 Microchip Technology Inc. ...
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... For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 1999 Microchip Technology Inc. PIC16CE62X Example PIC16CE625 -04I/P423 9907CDK Example PIC16CE625 -04I/SO218 9907CDK Example 16CE625 /JW 9907CBA Example PIC16CE625 -04I/218 9907CBP DS40182C-page 101 ...
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... PIC16CE62X NOTES: DS40182C-page 102 1999 Microchip Technology Inc. ...
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... APPENDIX A: CODE FOR ACCESSING EEPROM DATA MEMORY Please check our web site at www.microchip.com for code availability. 1999 Microchip Technology Inc. PIC16CE62X DS40182C-page 103 ...
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... PIC16CE62X NOTES: DS40182C-page 104 1999 Microchip Technology Inc. ...
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... ID Locations ........................................................................ 64 INCF Instruction .................................................................. 71 INCFSZ Instruction ............................................................. 71 In-Circuit Serial Programming ............................................. 64 Indirect Addressing, INDF and FSR Registers ................... 21 Instruction Flow/Pipelining .................................................. 10 Instruction Set ADDLW ....................................................................... 67 ADDWF....................................................................... 67 ANDLW ....................................................................... 67 ANDWF....................................................................... 67 BCF............................................................................. 68 BSF ............................................................................. 68 1999 Microchip Technology Inc. PIC16CE62X BTFSC........................................................................ 68 BTFSS ........................................................................ 69 CALL........................................................................... 69 CLRF .......................................................................... 69 CLRW ......................................................................... 69 CLRWDT .................................................................... 70 COMF ......................................................................... 70 DECF.......................................................................... 70 DECFSZ ..................................................................... 70 GOTO ......................................................................... 71 INCF ........................................................................... 71 INCFSZ....................................................................... 71 IORLW ...
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... TMR0 with External Clock........................................... 37 Timer1 Switching Prescaler Assignment................................. 39 Timing Diagrams and Specifications................................... 91 TMR0 Interrupt .................................................................... 60 TRIS Instruction .................................................................. 76 TRISA.................................................................................. 23 TRISB.................................................................................. 26 V Voltage Reference Module.................................................. 47 VRCON Register................................................................. 47 W Watchdog Timer (WDT) ...................................................... 61 WWW, On-Line Support........................................................ 2 X XORLW Instruction ............................................................. 76 XORWF Instruction ............................................................. 76 DS40182C-page 106 1999 Microchip Technology Inc. ...
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... Trademarks: The Microchip name, logo, PIC, PICmicro, PICSTART, PICMASTER, PRO MATE and MPLAB are registered trademarks of Microchip Technology Incorpo- rated in the U.S.A. and other countries. Flex ROM and fuzzy LAB are trademarks and SQTP is a service mark of Microchip in the U ...
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... Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS40182C-page 108 Total Pages Sent FAX: (______) _________ - _________ N Literature Number: DS40182C 1998 Microchip Technology Inc. ...
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... Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 1999 Microchip Technology Inc. PIC16CE62X 3-Digit Pattern Code for QTP (blank otherwise) ...
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... PIC16CE62X NOTES: DS40182C-page 110 1999 Microchip Technology Inc. ...
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... NOTES: 1999 Microchip Technology Inc. PIC16CE62X DS40182C-page 111 ...
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... Serialized Quick Turn Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...
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... Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...