PIC18F26K20-I/ML Microchip Technology, PIC18F26K20-I/ML Datasheet - Page 295

IC PIC MCU FLASH 32KX16 28-QFN

PIC18F26K20-I/ML

Manufacturer Part Number
PIC18F26K20-I/ML
Description
IC PIC MCU FLASH 32KX16 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F26K20-I/ML

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3936Byte
Cpu Speed
64MHz
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K20-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F26K20-I/ML
0
22.2
The following steps are needed to set up the HLVD
module:
1.
2.
3.
4.
5.
22.3
When the module is enabled, the HLVD comparator
and voltage divider are enabled and will consume static
current. The total current consumption, when enabled,
is specified in electrical specification parameter D024B.
FIGURE 22-2:
 2010 Microchip Technology Inc.
Write the value to the HLVDL<3:0> bits that
selects the desired HLVD trip point.
Set the VDIRMAG bit to detect high voltage
(VDIRMAG = 1) or low voltage (VDIRMAG = 0).
Enable the HLVD module by setting the
HLVDEN bit.
Clear the HLVD interrupt flag bit of the PIR2
register, which may have been set from a
previous interrupt.
Enable the HLVD interrupt if interrupts are
desired by setting the HLVDIE bit of the PIE2
register, and the GIE and PEIE bits of the INT-
CON register. An interrupt will not be generated
until the IRVST bit is set.
CASE 1:
CASE 2:
Enable HLVD
Enable HLVD
HLVD Setup
Current Consumption
HLVDIF
HLVDIF
IRVST
IRVST
V
V
DD
DD
LOW-VOLTAGE DETECT OPERATION (VDIRMAG =
Internal Reference is stable
Internal Reference is stable
T
T
IVRST
IVRST
HLVDIF may not be set
HLVDIF cleared by software,
HLVDIF remains set since HLVD condition still exists
Depending on the application, the HLVD module does
not need to be operating constantly. To decrease the
current requirements, the HLVD circuitry may only
need to be enabled for short periods where the voltage
is checked. After doing the check, the HLVD module
may be disabled.
22.4
The internal reference voltage of the HLVD module,
specified in electrical specification parameter D420,
may be used by other internal circuitry, such as the
Programmable Brown-out Reset. If the HLVD or other
circuits using the voltage reference are disabled to
lower the device’s current consumption, the reference
voltage circuit will require time to become stable before
a low or high-voltage condition can be reliably
detected. This start-up time, T
is independent of device clock speed. It is specified in
electrical specification parameter 36.
The HLVD interrupt flag is not enabled until T
expired and a stable reference voltage is reached. For
this reason, brief excursions beyond the set point may
not be detected during this interval. Refer to Figure 22-2
or Figure 22-3.
PIC18F2XK20/4XK20
HLVD Start-up Time
HLVDIF cleared by software
0
)
HLVDIF cleared by software
IRVST
V
V
DS41303G-page 295
, is an interval that
HLVD
HLVD
IRVST
has

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