PIC18F26K20-I/ML Microchip Technology, PIC18F26K20-I/ML Datasheet - Page 240

• Manufacturer Part Number: PIC18F26K20-I/ML
• Description: IC PIC MCU FLASH 32KX16 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-I/ML

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3936Byte
• Cpu Speed: 64MHz
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / Rohs Status: Details

PIC18F2XK20/4XK20
18.1.1.5
The TRMT bit of the TXSTA register indicates the
status of the TSR register. This is a read-only bit. The
TRMT bit is set when the TSR register is empty and is
cleared when a character is transferred to the TSR
register from the TXREG. The TRMT bit remains clear
until all bits have been shifted out of the TSR register.
No interrupt logic is tied to this bit, so the user needs to
poll this bit to determine the TSR status.
18.1.1.6
The EUSART supports 9-bit character transmissions.
When the TX9 bit of the TXSTA register is set the
EUSART will shift 9 bits out for each character transmit-
ted. The TX9D bit of the TXSTA register is the ninth,
and Most Significant, data bit. When transmitting 9-bit
data, the TX9D data bit must be written before writing
the 8 Least Significant bits into the TXREG. All nine bits
of data will be transferred to the TSR shift register
immediately after the TXREG is written.
A special 9-bit Address mode is available for use with
multiple receivers. See Section 18.1.2.8 “Address
Detection” for more information on the Address mode.
FIGURE 18-3:
DS41303G-page 240
RC4/C2OUT/TX/CK
Note:
Reg. Empty Flag)
Reg. Empty Flag)
Write to TXREG
(Transmit Buffer
(Transmit Shift
BRG Output
(Shift Clock)
TRMT bit
TXIF bit
The TSR register is not mapped in data
memory, so it is not available to the user.
TSR Status
Transmitting 9-Bit Characters
pin
ASYNCHRONOUS TRANSMISSION
Word 1
Transmit Shift Reg
Word 1
1 T
CY
Start bit
bit 0
bit 1
Word 1
18.1.1.7
1.
2.
3.
4.
5.
6.
7.
8.
9.
Initialize the SPBRGH:SPBRG register pair and
the BRGH and BRG16 bits to achieve the desired
baud rate (see Section 18.3 “EUSART Baud
Rate Generator (BRG)”).
Set the RX/DT and TX/CK TRIS controls to ‘1’.
Enable the asynchronous serial port by clearing
the SYNC bit and setting the SPEN bit.
If 9-bit transmission is desired, set the TX9 con-
trol bit. A set ninth data bit will indicate that the 8
Least Significant data bits are an address when
the receiver is set for address detection.
Set the CKTXP control bit if inverted transmit
data polarity is desired.
Enable the transmission by setting the TXEN
control bit. This will cause the TXIF interrupt bit
to be set.
If interrupts are desired, set the TXIE interrupt
enable bit. An interrupt will occur immediately
provided that the GIE and PEIE bits of the INT-
CON register are also set.
If 9-bit transmission is selected, the ninth bit
should be loaded into the TX9D data bit.
Load 8-bit data into the TXREG register. This
will start the transmission.
Asynchronous Transmission Set-up:
bit 7/8
 2010 Microchip Technology Inc.
Stop bit