ATTINY44-15SSZ Atmel, ATTINY44-15SSZ Datasheet - Page 69
![IC MCU AVR 4K FLASH 15MHZ 14SOIC](/photos/7/39/73946/313-14-soic_sml.jpg)
ATTINY44-15SSZ
Manufacturer Part Number
ATTINY44-15SSZ
Description
IC MCU AVR 4K FLASH 15MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY44-15SSZ.pdf
(225 pages)
Specifications of ATTINY44-15SSZ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / Rohs Status
Details
Other names
Q3447517
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY44-15SSZ
Manufacturer:
ATMEL
Quantity:
350
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- Download datasheet (4Mb)
7701E–AVR–02/11
• Port B, Bit 3 – RESET/dW/PCINT11
RESET: External Reset input is active low and enabled by un-programming ("1") the RST-
DISBL fuse. Pull-up is activated and output driver and digital input are deactivated when the
pin is used as the RESET pin.
dW: When the debugWIRE enable (DWEN) fuse is programmed and lock bits are un-pro-
grammed, the debugWIRE system within the target device is activated. The RESET port pin is
configured as a wire-AND (open-drain) bi-directional I/O pin with pull-up enabled and becomes
the communication gateway between target and emulator.
PCINT11: Pin change interrupt source 11. The PB3 pin can serve as an external interrupt
source for pin change interrupt 1.
Table 12-8 on page 69
the overriding signals shown in
Table 12-8.
1.
2.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
RSTDISBL is 1 when the Fuse is “0” (Programmed).
DebugWIRE is enabled when DWEN fuse is programmed and lock bits are un-programmed.
PB3/
PCINT11
RSTDISBL
1
RSTDISBL
DEBUGWIRE_ENABLE
Transmit
RSTDISBL
0
0
RSTDISBL
+ PCINT11 • PCIE1
DEBUGWIRE_ENABLE
• PCINT11 • PCIE1)
dW/PCINT11 Input
Overriding Signals for Alternate Functions in PB3..PB2
RESET/dW/
(1)
(1)
(1)
(1)
+ DEBUGWIRE_ENABLE
+ DEBUGWIRE_ENABLE
+ DEBUGWIRE_ENABLE
+ DEBUGWIRE_ENABLE
and
Atmel ATtiny24/44/84 [Preliminary]
Table 12-9 on page 70
Figure 12-5 on page
(2)
(2)
• debugWire
+ (RSTDISBL
(2)
(2)
(2)
(2)
(1)
relate the alternate functions of Port B to
62.
PB2/INT0/OC0A/CKOUT/PCINT10
CKOUT
0
CKOUT
1'b1
CKOUT + OC0A enable
CKOUT • System Clock + CKOUT • OC0A
0
PCINT10 • PCIE1 + INT0
PCINT10 • PCIE1 + INT0
INT0/PCINT10 Input
69
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