ATTINY45-15SZ Atmel, ATTINY45-15SZ Datasheet - Page 144
![MCU AVR 4K FLASH 15MHZ 8-SOIC](/photos/6/50/65032/453-8-soic_sml.jpg)
ATTINY45-15SZ
Manufacturer Part Number
ATTINY45-15SZ
Description
MCU AVR 4K FLASH 15MHZ 8-SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY25-15MZ.pdf
(196 pages)
Specifications of ATTINY45-15SZ
Package / Case
8-SOIC (3.9mm Width)
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
6
Eeprom Size
256 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
256 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY45-15SZ
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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21.8
21.8.1
21.8.2
21.8.3
144
High-voltage Serial Programming Algorithm Sequence
ATtiny25/45/85
Enter High-voltage Serial Programming Mode
Considerations for Efficient Programming
Chip Erase
To program and verify the ATtiny25/45/85 in the High-voltage Serial Programming mode, the fol-
lowing sequence is recommended (See instruction formats in
The following algorithm puts the device in High-voltage Serial Programming mode:
Table 21-15. High-voltage Reset Characteristics
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered.
The Chip Erase will erase the Flash and EEPROM
not reset until the Program memory has been completely erased. The Fuse bits are not
changed. A Chip Erase must be performed before the Flash and/or EEPROM are
re-programmed.
Note:
Supply Voltage
V
4.5V
5.5V
1. Apply 4.5 - 5.5V between V
2. Set RESET pin to “0” and toggle SCI at least six times.
3. Set the Prog_enable pins listed in
4. Apply V
5. Shortly after latching the Prog_enable signature, the device will activly output data on
6. Wait at least 50 µs before giving any serial instructions on SDI/SII.
• The command needs only be loaded once when writing or reading multiple memory
• Skip writing the data value 0xFF that is the contents of the entire EEPROM (unless the
• Address High byte needs only be loaded before programming or reading a new 256 word
1. Load command “Chip Erase” (see
2. Wait after Instr. 3 until SDO goes high for the “Chip Erase” cycle to finish.
3. Load Command “No Operation”.
CC
locations.
EESAVE Fuse is programmed) and Flash after a Chip Erase.
window in Flash or 256 byte EEPROM. This consideration also applies to Signature bytes
reading.
t
been latched.
the Prog_enable[2]/SDO pin, and the resulting drive contention may increase the power
consumption. To minimize this drive contention, release the Prog_enable[2] pin after
t
HVRST
HVRST
1. The EEPROM memory is preserved during Chip Erase if the EESAVE Fuse is programmed.
after the High-voltage has been applied to ensure the Prog_enable signature has
has elapsed.
HVRST
- 5.5V to RESET. Keep the Prog_enable pins unchanged for at least
RESET Pin High-voltage Threshold
CC
V
and GND.
11.5V
11.5V
HVRST
Table 21-14
Table
21-16).
(1)
to “000” and wait at least 100 ns.
memories plus Lock bits. The Lock bits are
Minimum High-voltage Period for
Table
Latching Prog_enable
21-16):
100 ns
100 ns
t
HVRST
7598H–AVR–07/09
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