AT90PWM81-16SF Atmel, AT90PWM81-16SF Datasheet - Page 251

• Manufacturer Part Number: AT90PWM81-16SF
• Description: IC MCU AVR 8K FLASH ISP 20SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16SF

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7734P–AVR–08/10
Table 21-5.
Notes:
Table 21-6.
Note:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if Lock bit1
(LB1) is programmed. Program the Fuse bits before programming the Lock bits.
High Fuse Byte
RSTDISBL
DWEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Low Fuse Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(2)
1. See
2. The SPIEN Fuse is not accessible in serial programming mode.
3. See
4. The default value of BOOTSZ1..0 results in maximum Boot Size. See
1. The default value of SUT1..0 results in maximum start-up time for the default clock source. See
2. The default setting of CKSEL3..0 results in internal RC Oscillator @ 8 MHz. See
3. The CKOUT Fuse allows the system clock to be output on PORTD0. See
4. See
(3)
(4)
(3)
(1)
details.
5-4 on page 30
28
page 34
for details.
Fuse High Byte
Fuse Low Byte
“Alternate Functions of Port E” on page 78
“Watchdog Timer Configuration” on page 59
“System Clock Prescaler” on page 38
for details.
for details.
Bit No
Bit No
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Description
External Reset Disable
debugWIRE Enable
Enable Serial Program and Data
Downloading
Watchdog Timer Always On
EEPROM memory is preserved
through the Chip Erase
Select Boot Size
(see Table 113 for details)
Select Boot Size
(see Table 113 for details)
Select Reset Vector
Description
Divide clock by 8
Clock output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
for details.
for description of RSTDISBL Fuse.
for details.
Default Value
1 (unprogrammed)
1 (unprogrammed)
0 (programmed, SPI
programming enabled)
1 (unprogrammed)
1 (unprogrammed), EEPROM
not reserved
0 (programmed)
0 (programmed)
1 (unprogrammed)
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
Table 21-7 on page 253
AT90PWM81
“Clock Output Buffer” on
Table 5-1 on page
(4)
(4)
(1)
(2)
(2)
(2)
(1)
(2)
for
Table
251