ATMEGA8A-MUR Atmel, ATMEGA8A-MUR Datasheet - Page 56
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ATMEGA8A-MUR
Manufacturer Part Number
ATMEGA8A-MUR
Description
MCU AVR 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8A-MU.pdf
(308 pages)
Specifications of ATMEGA8A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8159D–AVR–02/11
Figure 12-5. Alternate Port Functions
Note:
Table 12-6
ure 12-5
in the modules having the alternate function.
1. WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk
are not shown in the succeeding tables. The overriding signals are generated internally
PUOExn:
PUOVxn:
DDOExn:
DDOVxn:
PVOExn:
PVOVxn:
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP:
Pxn
summarizes the function of the overriding signals. The pin and port indexes from
and PUD are common to all ports. All other signals are unique for each pin.
Pxn PULL-UP OVERRIDE ENABLE
Pxn PULL-UP OVERRIDE VALUE
Pxn DATA DIRECTION OVERRIDE ENABLE
Pxn DATA DIRECTION OVERRIDE VALUE
Pxn PORT VALUE OVERRIDE ENABLE
Pxn PORT VALUE OVERRIDE VALUE
SLEEP CONTROL
1
0
1
0
1
0
1
0
(1)
PUOExn
PUOVxn
PVOExn
PVOVxn
DIEOExn
DIEOVxn
SLEEP
DDOExn
DDOVxn
PUD:
WDx:
RDx:
RRx:
WPx:
RPx:
clk
DIxn:
AIOxn:
SYNCHRONIZER
D
L
I/O
SET
CLR
:
Q
Q
WRITE DDRx
WRITE PORTx
PULLUP DISABLE
READ DDRx
READ PORTx REGISTER
READ PORTx PIN
I/O CLOCK
DIGITAL INPUT PIN n ON PORTx
ANALOG INPUT/OUTPUT PIN n ON PORTx
D
PINxn
CLR
Q
Q
RESET
RESET
PORTxn
Q
Q
Q
Q
DDxn
CLR
CLR
D
D
ATmega8A
clk
PUD
WDx
RDx
WPx
RRx
DIxn
AIOxn
RPx
I/O
I/O
, SLEEP,
Fig-
56
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