ATMEGA8A-MUR Atmel, ATMEGA8A-MUR Datasheet - Page 211
ATMEGA8A-MUR
Manufacturer Part Number
ATMEGA8A-MUR
Description
MCU AVR 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8A-MU.pdf
(308 pages)
Specifications of ATMEGA8A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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22.8.3.2
8159D–AVR–02/11
ADLAR = 1
When an ADC conversion is complete, the result is found in these two registers.
When ADCL is read, the ADC Data Register is not updated until ADCH is read. Consequently, if
the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read
ADCH. Otherwise, ADCL must be read first, then ADCH.
The ADLAR bit in ADMUX, and the MUXn bits in ADMUX affect the way the result is read from
the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the result
is right adjusted.
• ADC9:0: ADC Conversion result
These bits represent the result from the conversion, as detailed in
page
Bit
Read/Write
Initial Value
207.
ADC9
ADC1
15
R
R
7
0
0
ADC8
ADC0
14
R
R
6
0
0
ADC7
13
R
R
–
5
0
0
ADC6
12
R
R
–
4
0
0
ADC5
11
R
R
–
3
0
0
ADC4
10
R
R
–
2
0
0
“ADC Conversion Result” on
ADC3
R
R
9
–
1
0
0
ATmega8A
ADC2
R
R
8
–
0
0
0
ADCH
ADCL
211
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