ATMEGA8A-MUR Atmel, ATMEGA8A-MUR Datasheet - Page 152
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ATMEGA8A-MUR
Manufacturer Part Number
ATMEGA8A-MUR
Description
MCU AVR 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8A-MU.pdf
(308 pages)
Specifications of ATMEGA8A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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19.7.3
8159D–AVR–02/11
Asynchronous Operational Range
Figure 19-7. Stop Bit Sampling and Next Start Bit Sampling
The same majority voting is done to the stop bit as done for the other bits in the frame. If the stop
bit is registered to have a logic 0 value, the Frame Error (FE) Flag will be set.
A new high to low transition indicating the start bit of a new frame can come right after the last of
the bits used for majority voting. For Normal Speed mode, the first low level sample can be at
point marked (A) in
(B). (C) marks a stop bit of full length. The early start bit detection influences the operational
range of the Receiver.
The operational range of the Receiver is dependent on the mismatch between the received bit
rate and the internally generated baud rate. If the Transmitter is sending frames at too fast or too
slow bit rates, or the internally generated baud rate of the Receiver does not have a similar (see
Table
bit.
The following equations can be used to calculate the ratio of the incoming data rate and internal
Receiver baud rate.
D
S
S
S
R
Table 19-2
that Normal Speed mode has higher toleration of baud rate variations.
F
M
slow
(U2X = 0)
(U2X = 1)
Sample
Sample
RxD
19-2) base frequency, the Receiver will not be able to synchronize the frames to the start
R
slow
and
Sum of character size and parity size (D = 5- to 10-bit)
Samples per bit. S = 16 for Normal Speed mode and S = 8
for Double Speed mode.
First sample number used for majority voting. S
and S
Middle sample number used for majority voting. S
and S
is the ratio of the slowest incoming data rate that can be accepted in relation to the
Receiver baud rate. R
accepted in relation to the Receiver baud rate.
=
Table 19-3
------------------------------------------ -
S 1
–
Figure
F
M
= 4 for Double Speed mode.
(
1
1
= 5 for Double Speed mode.
D
+
+
D S ⋅
2
1
list the maximum Receiver baud rate error that can be tolerated. Note
19-7. For Double Speed mode the first low level must be delayed to
)S
3
2
+
S
4
F
fast
5
3
is the ratio of the fastest incoming data rate that can be
6
7
4
8
STOP 1
9
5
R
10
fast
(A)
0/1
6
=
F
0/1
-----------------------------------
(
= 8 for Normal Speed
D
M
(
(B)
0/1
0/1
+
= 9 for Normal Speed
D
1
+
)S
2
)S
+
S
ATmega8A
M
(C)
152
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