ATMEGA8A-AUR Atmel, ATMEGA8A-AUR Datasheet - Page 227

• Manufacturer Part Number: ATMEGA8A-AUR
• Description: MCU AVR 8KB FLASH 16MHZ 32TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8A-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.2
8159D–AVR–02/11
Fuse Bits
Table 24-2.
Notes:
The ATmega8A has two fuse bytes.
of all the fuses and how they are mapped into the fuse bytes. Note that the fuses are read as
logical zero, “0”, if they are programmed.
Table 24-3.
Notes:
RSTDISBL
WDTON
SPIEN
CKOPT
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
BLB1 Mode
Fuse High
Byte
1
2
3
4
(1)
1. Program the Fuse Bits before programming the Lock Bits.
2. “1” means unprogrammed, “0” means programmed
1. The SPIEN Fuse is not accessible in Serial Programming mode.
2. The CKOPT Fuse functionality depends on the setting of the CKSEL bits,
3. The default value of BOOTSZ1:0 results in maximum Boot Size. See
4. When programming the RSTDISBL Fuse Parallel Programming has to be used to change
(2)
Memory Lock Bits
(4)
on page 25
fuses or perform further programming.
Lock Bit Protection Modes
Fuse High Byte
BLB12
Bit No.
1
1
0
0
7
6
5
4
3
2
1
0
for details.
Description
Select if PC6 is I/O pin or RESET pin
WDT always on
Enable Serial Program and Data
Downloading
Oscillator options
EEPROM memory is preserved through
the Chip Erase
Select Boot Size (see
details)
Select Boot Size (see
details)
Select Reset Vector
BLB11
1
0
0
1
Table 24-3
Protection Type
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
from the Boot Loader section. If Interrupt Vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section.
LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
(2)
(Continued)
Table 23-6
Table 23-6
and
Table 24-4
for
for
describe briefly the functionality
Default Value
1 (unprogrammed, PC6 is
RESET-pin)
1 (unprogrammed, WDT
enabled by WDTCR)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed, EEPROM
not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
Table 23-6 on page
ATmega8A
see “Clock Sources”
(3)
(3)
223.
227