ATMEGA8A-AUR Atmel, ATMEGA8A-AUR Datasheet - Page 188
ATMEGA8A-AUR
Manufacturer Part Number
ATMEGA8A-AUR
Description
MCU AVR 8KB FLASH 16MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8A-MU.pdf
(308 pages)
Specifications of ATMEGA8A-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Table 20-7.
8159D–AVR–02/11
Status Code
(TWSR)
Prescaler Bits
are 0
0xA8
0xB0
0xB8
0xC0
0xC8
Status of the Two-wire Serial Bus
and Two-wire Serial Interface
Hardware
Own SLA+R has been received;
ACK has been returned
Arbitration lost in SLA+R/W as
Master; own SLA+R has been
received; ACK has been returned
Data byte in TWDR has been
transmitted; ACK has been
received
Data byte in TWDR has been
transmitted; NOT ACK has been
received
Last data byte in TWDR has been
transmitted (TWEA = “0”); ACK
has been received
Status Codes for Slave Transmitter Mode
Table 20-8.
Reception of the own
slave address and one or
more data bytes
Arbitration lost as master
and addressed as slave
Last data byte transmitted.
Switched to not addressed
slave (TWEA = '0')
To/from TWDR
Load data byte or
Load data byte
Load data byte or
Load data byte
Load data byte or
Load data byte
No TWDR action or
No TWDR action or
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action or
No TWDR action or
No TWDR action
From master to slave
From slave to master
Formats and States in the Slave Transmitter Mode
S
Application Software Response
SLA
STA
X
X
X
X
X
X
0
0
1
1
0
0
1
1
STO
R
DATA
0
0
0
0
0
0
0
0
0
0
0
0
0
0
To TWCR
$A8
$B0
TWINT
A
A
n
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A
TWEA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DATA
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-Wire Serial Bus. The
prescaler bits are zero or masked to zero
Next Action Taken by TWI Hardware
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
$B8
A
DATA
$C0
$C8
ATmega8A
A
A
P or S
All 1's
P or S
188
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