ATTINY48-MUR Atmel, ATTINY48-MUR Datasheet - Page 201

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ATTINY48-MUR

Manufacturer Part Number
ATTINY48-MUR
Description
MCU AVR 4KB FLASH 12MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY48-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY48-MUR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
8008G–AVR–04/11
Figure 21-7. Serial Programming and Verify
Notes:
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the Serial mode ONLY) and there is no need to first execute the Chip Erase
instruction.
The Chip Erase operation turns the content of every memory location in both the Program and
EEPROM arrays into 0xFF.
Depending on CKSEL fuses, a valid clock must be present. The minimum low and high periods
for the serial clock (SCK) input are defined as follows:
• Minimum low period of serial clock:
• Minimum high period of serial clock:
– When f
– When f
– When f
– When f
1. If the device is clocked by the internal oscillator, it is no need to connect a clock source to the
2. V
CLKI pin.
CC
ck
ck
ck
ck
- 0.3V <
< 12MHz: > 2 CPU clock cycles
>= 12MHz: 3 CPU clock cycles
< 12MHz: > 2 CPU clock cycles
>= 12MHz: 3 CPU clock cycles
MOSI
MISO
SCK
AV
CC
< V
CC
+ 0.3V, however, AV
CLKI
RESET
GND
(1)
CC
should always be within 1.8 – 5.5V
AVCC
VCC
+1.8 - 5.5V
+1.8 - 5.5V
ATtiny48/88
(2)
201

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