ATTINY48-MUR Atmel, ATTINY48-MUR Datasheet - Page 177

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ATTINY48-MUR

Manufacturer Part Number
ATTINY48-MUR
Description
MCU AVR 4KB FLASH 12MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY48-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY48-MUR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
8008G–AVR–04/11
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
sions. For a complete description of this bit, see
page
• Bits 3:0 – MUX[3:0]: Analog Channel Selection Bits
The value of these bits selects which analog inputs are connected to the ADC. Selecting the sin-
gle-ended channel ADC8 enables the temperature measurement. See
these bits are changed during a conversion, the change will not go in effect until this conversion
is complete (ADIF in ADCSRA is set).
Table 17-4.
Note:
179.
1. See
2. After switching to internal voltage reference the ADC requires a settling time of 1ms before
measurements are stable. Conversions starting before this may not be reliable. The ADC must
be enabled during the settling time.
MUX[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Input Channel Selections
“Temperature Measurement” on page
Single Ended Input
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ADC8
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
1.1V (V
0V (GND)
(1)
BG
)
(2)
“ADCL and ADCH – The ADC Data Register” on
175.
Table 17-4
ATtiny48/88
for details. If
177

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