ATTINY48-MUR Atmel, ATTINY48-MUR Datasheet - Page 128

• Manufacturer Part Number: ATTINY48-MUR
• Description: MCU AVR 4KB FLASH 12MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY48-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.5.3
128
ATtiny48/88
SPDR – SPI Data Register
• Bit 0 – SPI2X: Double SPI Speed Bit
When this bit is written logic one the SPI speed (SCK Frequency) will be doubled when the SPI
is in Master mode (see
clock periods. When the SPI is configured as Slave, the SPI is only guaranteed to work at f
or lower.
The SPI interface on the ATtiny48/88 is also used for program memory and EEPROM down-
loading or uploading. See
The SPI Data Register is a read/write register used for data transfer between the Register File
and the SPI Shift Register. Writing to the register initiates data transmission. Reading the regis-
ter causes the Shift Register Receive buffer to be read.
Bit
0x2E (0x4E)
Read/Write
Initial Value
MSB
R/W
7
X
Table
R/W
page 200
X
6
14-5). This means that the minimum SCK period will be two CPU
R/W
X
5
for serial programming and verification.
R/W
X
4
R/W
3
X
R/W
2
X
R/W
X
1
LSB
R/W
X
0
8008G–AVR–04/11
Undefined
SPDR
osc
/4