PIC12F615-I/MS Microchip Technology, PIC12F615-I/MS Datasheet - Page 116
![IC PIC MCU FLASH 1KX14 8MSOP](/photos/6/59/65932/mfg_150_c04-111_ms_8-msop_sml.jpg)
PIC12F615-I/MS
Manufacturer Part Number
PIC12F615-I/MS
Description
IC PIC MCU FLASH 1KX14 8MSOP
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(26 pages)
3.PIC12F609T-ISN.pdf
(8 pages)
4.PIC12F615-ESN.pdf
(168 pages)
Specifications of PIC12F615-I/MS
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
64Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS-232, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC162083 - HEADER MPLAB ICD2 PIC16F616 8/14AC164325 - MODULE SKT FOR 8MSOPXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFN
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12F615-I/MS
Manufacturer:
RICHTEK
Quantity:
5 400
Part Number:
PIC12F615-I/MS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC12F609/615/12HV609/615
TABLE 13-2:
DS41302A-page 114
ADDWF
ANDWF
CLRF
CLRW
COMF
DECF
DECFSZ
INCF
INCFSZ
IORWF
MOVF
MOVWF
NOP
RLF
RRF
SUBWF
SWAPF
XORWF
BCF
BSF
BTFSC
BTFSS
ADDLW
ANDLW
CALL
CLRWDT
GOTO
IORLW
MOVLW
RETFIE
RETLW
RETURN
SLEEP
SUBLW
XORLW
Note 1:
Mnemonic,
Operands
2:
3:
When an I/O register is modified as a function of itself (e.g., MOVF GPIO, 1), the value used will be that value present
on the pins themselves. For example, if the data latch is ‘1’ for a pin configured as input and is driven low by an external
device, the data will be written back with a ‘0’.
If this instruction is executed on the TMR0 register (and where applicable, d = 1), the prescaler will be cleared if
assigned to the Timer0 module.
If the Program Counter (PC) is modified, or a conditional test is true, the instruction requires two cycles. The second
cycle is executed as a NOP.
f, d
f, d
f, d
f, d
f, d
f, d
f, d
f, d
f, d
f, d
f, d
f, d
f, d
f, d
f, b
f, b
f, b
f, b
–
–
–
–
–
–
k
k
k
k
k
k
k
k
k
f
f
PIC12F609/615/12HV609/615 INSTRUCTION SET
Add W and f
AND W with f
Clear f
Clear W
Complement f
Decrement f
Decrement f, Skip if 0
Increment f
Increment f, Skip if 0
Inclusive OR W with f
Move f
Move W to f
No Operation
Rotate Left f through Carry
Rotate Right f through Carry
Subtract W from f
Swap nibbles in f
Exclusive OR W with f
Bit Clear f
Bit Set f
Bit Test f, Skip if Clear
Bit Test f, Skip if Set
Add literal and W
AND literal with W
Call Subroutine
Clear Watchdog Timer
Go to address
Inclusive OR literal with W
Move literal to W
Return from interrupt
Return with literal in W
Return from Subroutine
Go into Standby mode
Subtract W from literal
Exclusive OR literal with W
BYTE-ORIENTED FILE REGISTER OPERATIONS
Description
BIT-ORIENTED FILE REGISTER OPERATIONS
LITERAL AND CONTROL OPERATIONS
Preliminary
Cycles
1 (2)
1 (2)
1(2)
1(2)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
2
1
1
2
2
2
1
1
1
MSb
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
01
01
01
01
11
11
10
00
10
11
11
00
11
00
00
11
11
14-Bit Opcode
0111
0101
0001
0001
1001
0011
1011
1010
1111
0100
1000
0000
0000
1101
1100
0010
1110
0110
00bb
01bb
10bb
11bb
111x
1001
0kkk
0000
1kkk
1000
00xx
0000
01xx
0000
0000
110x
1010
dfff
dfff
lfff
0xxx
dfff
dfff
dfff
dfff
dfff
dfff
dfff
lfff
0xx0
dfff
dfff
dfff
dfff
dfff
bfff
bfff
bfff
bfff
kkkk
kkkk
kkkk
0110
kkkk
kkkk
kkkk
0000
kkkk
0000
0110
kkkk
kkkk
© 2006 Microchip Technology Inc.
ffff
ffff
ffff
xxxx
ffff
ffff
ffff
ffff
ffff
ffff
ffff
ffff
0000
ffff
ffff
ffff
ffff
ffff
ffff
ffff
ffff
ffff
kkkk
kkkk
kkkk
0100
kkkk
kkkk
kkkk
1001
kkkk
1000
0011
kkkk
kkkk
LSb
Affected
C, DC, Z
C, DC, Z
C, DC, Z
C, DC, Z
TO, PD
TO, PD
Status
C
C
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Notes
1, 2, 3
1, 2, 3
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
2
3
3