PIC12F615-E/MF Microchip Technology, PIC12F615-E/MF Datasheet - Page 95
PIC12F615-E/MF
Manufacturer Part Number
PIC12F615-E/MF
Description
IC PIC MCU FLASH 1KX14 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(26 pages)
3.PIC12F609T-ISN.pdf
(8 pages)
4.PIC12F615-EMF.pdf
(196 pages)
Specifications of PIC12F615-E/MF
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-DFN
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC12F609T-ISN PDF datasheet
- PIC12F609T-ISN PDF datasheet #2
- PIC12F609T-ISN PDF datasheet #3
- PIC12F615-EMF PDF datasheet #4
- Current page: 95 of 196
- Download datasheet (3Mb)
REGISTER 10-3:
TABLE 10-7:
© 2008 Microchip Technology Inc.
APFCON
CCP1CON
CCPR1L
CCPR1H
CMCON0
CMCON1
ECCPAS
INTCON
PIE1
PIR1
T2CON
TMR2
TRISIO
Legend: - = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the PWM.
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
Name
PRSEN
R/W-0
(1)
(1)
(1)
(1)
(1)
(1)
For PIC12F615/HV615 only.
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Timer2 Module Register
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0
CMON
Bit 7
P1M
GIE
—
—
—
—
—
—
PRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes
0 = Upon auto-shutdown, ECCPASE must be cleared in software to restart the PWM
PDC<6:0>: PWM Delay Count bits
PDCn = Number of F
SUMMARY OF REGISTERS ASSOCIATED WITH PWM
R/W-0
PDC6
away; the PWM restarts automatically
PWM1CON: ENHANCED PWM CONTROL REGISTER
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
ADIE
ADIF
COUT
should transition active and the actual time it transitions active
Bit 6
PEIE
—
—
—
—
(1)
(1)
W = Writable bit
‘1’ = Bit is set
CCP1IE
CCP1IF
R/W-0
PDC5
TRISIO5
DC1B1
CMOE
Bit 5
T0IE
—
—
OSC
(1)
(1)
/4 (4 * T
PIC12F609/615/12HV609/615
TRISIO4
T1GSEL
CMPOL
DC1B0
T1ACS
Bit 4
INTE
—
—
R/W-0
PDC4
OSC
CCP1M3 CCP1M2 CCP1M1
PSSAC1
TRISIO3
) cycles between the scheduled time when a PWM signal
CMHYS
CMIE
GPIE
CMIF
Bit 3
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
PDC3
PSSAC0 PSSBD1
TRISIO2
Bit 2
CMR
T0IF
—
—
—
—
TMR2IE
TMR2IF
TRISIO1
P1BSEL
T1GSS
Bit 1
INTF
—
R/W-0
PDC2
(1)
(1)
CMSYNC ---0 0-10 ---0 0-10
CCP1M0 0-00 0000 0-00 0000
PSSBD0 0000 0000 0000 0000
P1ASEL
TRISIO0
TMR1IE
TMR1IF
CMCH
GPIF
Bit 0
x = Bit is unknown
R/W-0
PDC1
---0 --00 ---0 --00
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 -0-0 0000 -0-0
0000 0000 0000 0000
-00- 0-00 -00- 0-00
-00- 0-00 -00- 0-00
0000 0000 0000 0000
--11 1111 --11 1111
POR, BOR
Value on
DS41302B-page 93
R/W-0
PDC0
Value on
all other
Resets
bit 0
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