PIC12F615-E/MF Microchip Technology, PIC12F615-E/MF Datasheet - Page 18
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PIC12F615-E/MF
Manufacturer Part Number
PIC12F615-E/MF
Description
IC PIC MCU FLASH 1KX14 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(26 pages)
3.PIC12F609T-ISN.pdf
(8 pages)
4.PIC12F615-EMF.pdf
(196 pages)
Specifications of PIC12F615-E/MF
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-DFN
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC12F609T-ISN PDF datasheet
- PIC12F609T-ISN PDF datasheet #2
- PIC12F609T-ISN PDF datasheet #3
- PIC12F615-EMF PDF datasheet #4
- Current page: 18 of 196
- Download datasheet (3Mb)
PIC12F609/615/12HV609/615
2.2.2.2
The OPTION register is a readable and writable regis-
ter, which contains various control bits to configure:
• Timer0/WDT prescaler
• External GP2/INT interrupt
• Timer0
• Weak pull-ups on GPIO
REGISTER 2-2:
DS41302B-page 16
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
R/W-1
GPPU
OPTION Register
GPPU: GPIO Pull-up Enable bit
1 = GPIO pull-ups are disabled
0 = GPIO pull-ups are enabled by individual PORT latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of GP2/INT pin
0 = Interrupt on falling edge of GP2/INT pin
T0CS: Timer0 Clock Source Select bit
1 = Transition on GP2/T0CKI pin
0 = Internal instruction cycle clock (F
T0SE: Timer0 Source Edge Select bit
1 = Increment on high-to-low transition on GP2/T0CKI pin
0 = Increment on low-to-high transition on GP2/T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
INTEDG
R/W-1
OPTION_REG: OPTION REGISTER
BIT VALUE
000
001
010
011
100
101
110
111
W = Writable bit
‘1’ = Bit is set
R/W-1
T0CS
TIMER0 RATE WDT RATE
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
R/W-1
T0SE
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
OSC
/4)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
PSA
Note:
To achieve a 1:1 prescaler assignment for
Timer0, assign the prescaler to the WDT
by setting PSA bit to ‘1’ of the OPTION
register. See Section 5.1.3 “Software
Programmable Prescaler”.
R/W-1
PS2
© 2008 Microchip Technology Inc.
x = Bit is unknown
R/W-1
PS1
R/W-1
PS0
bit 0
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