PIC12F510-E/SN Microchip Technology, PIC12F510-E/SN Datasheet - Page 29
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PIC12F510-E/SN
Manufacturer Part Number
PIC12F510-E/SN
Description
IC PIC MCU FLASH 1KX14 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F510-ISN.pdf
(124 pages)
2.PIC12F510-ISN.pdf
(8 pages)
3.PIC12F510-ISN.pdf
(20 pages)
Specifications of PIC12F510-E/SN
Core Size
8-Bit
Program Memory Size
1.5KB (1K x 12)
Core Processor
PIC
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
38 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
38Byte
Cpu Speed
8MHz
No. Of Timers
1
Digital Ic Case Style
SOIC
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
38 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
5
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164101, DV164120, DM163029
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 3 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162070 - HEADER INTRFC MPLAB ICD2 8/14P
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
5.0
As with any other register, the I/O register(s) can be
written and read under program control. However, read
instructions (e.g., MOVF PORTB, W) always read the I/O
pins independent of the pin’s Input/Output modes. On
Reset, all I/O ports are defined as input (inputs are at
high-impedance) since the I/O control registers are all
set.
5.1
PORTB/GPIO is an 8-bit I/O register. Only the low-
order 6 bits are used (RB/GP<5:0>). Bits 7 and 6 are
unimplemented and read as ‘0’s. Please note that RB3/
GP3 is an input only pin. The Configuration Word can
set several I/O’s to alternate functions. When acting as
alternate functions, the pins will read as ‘0’ during a port
read. Pins RB0/GP0, RB1/GP1, RB3/GP3 and RB4
(PIC16F506 only) can be configured with weak pull-up
and also for wake-up on change. The wake-up on
change and weak pull-up functions are not pin select-
able. If RB3/GP3/MCLR is configured as MCLR, weak
pull-up is always on and wake-up on change for this pin
is not enabled.
5.2
PORTC is an 8-bit I/O register. Only the low-order 6 bits
are used (RC<5:0>). Bits 7 and 6 are unimplemented
and read as ‘0’s.
5.3
The Output Driver Control register is loaded with the
contents of the W register by executing the TRIS f
instruction. A ‘1’ from a TRIS register bit puts the corre-
sponding output driver in a High-Impedance mode. A
‘0’ puts the contents of the output data latch on the
selected pins, enabling the output buffer. The exception
is RB3/GP3, which are input only, and the T0CKI pin,
which may be controlled by the OPTION register. See
Register 4-3.
© 2007 Microchip Technology Inc.
Note:
Note:
Note:
I/O PORT
PORTB/GPIO
PORTC (PIC16F506 Only)
TRIS Registers
On the PIC12F510, I/O PORTB is refer-
enced as GPIO. On the PIC16F506, I/O
PORTB is referenced as PORTB.
A read of the port reads the pins, not the
output data latches. That is, if an output
driver on a pin is enabled and driven high
but the external system is holding it low, a
read of the port will indicate that the pin is
low.
The TRIS registers are write-only and are
set (output drivers disabled) upon Reset.
5.4
The equivalent circuit for an I/O port pin is shown in
Figure 5-1. All port pins, except RB3/GP3 which is
input only, may be used for both input and output oper-
ations. For input operations, these ports are non-latch-
ing. Any input must be present until read by an input
instruction (e.g., MOVF PORTB, W). The outputs are
latched and remain unchanged until the output latch is
rewritten. To use a port pin as output, the correspond-
ing direction control bit in TRIS must be cleared (= 0).
For use as an input, the corresponding TRIS bit must
be set. Any I/O pin (except RB3/GP3) can be
programmed individually as input or output.
FIGURE 5-1:
Data
Bus
Note 1: GP3/RB3 has protection diode to V
PIC12F510/16F506
2: For pin specific information, see Figure 5-2
I/O Interfacing
D
Interface
through Figure 5-13.
CK
Data
Bus
Reset
Q
Q
PIC12F510/16F506
EQUIVALENT CIRCUIT
FOR PIN DRIVE
V
V
P
N
DS41268D-page 27
SS
DD
V
(2)
V
DD
SS
SS
(1)
only.
I/O
pin