PIC12F510-I/L MICROCHIP [Microchip Technology], PIC12F510-I/L Datasheet
PIC12F510-I/L
Related parts for PIC12F510-I/L
PIC12F510-I/L Summary of contents
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... Flash Microcontroller *8-bit, 8-pin Devices Protected by Microchip’s Low Pin Count Patent: U.S. Patent No. 5,847,450. Additional U.S. and foreign patents and applications may be issued or pending. © 2006 Microchip Technology Inc. PIC12F510/16F506 Data Sheet Preliminary DS41268B ...
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Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families ...
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... Special Function Hardware registers (PIC16F506) • Operating speed – 8 MHz Crystal Oscillator (PIC12F510 – 500 ns instruction cycle (PIC12F510 – 20 MHz Crystal Oscillator (PIC16F506 – 200 ns instruction cycle (PIC16F506) Special Microcontroller Features: • MHz selectable precision internal oscillator: - Factory calibrated to ±1% • ...
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... PIC12F510/16F506 Program Memory Device Flash (words) PIC16F506 PIC12F510 Pin Diagrams PDIP, SOIC and TSSOP RB5/OSC1/CLKIN RB4/OSC2/CLKOUT RB3/MCLR/V RC5/T0CKI RC4/C2OUT PDIP, SOIC, MSOP GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/V DS41268B-page 2 Data Memory SRAM (bytes) 1024 67 1024 RB0/AN0/C1IN+/ICSPDAT 2 13 RB1/AN1/C1IN-/ICSPCLK 3 12 ...
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... Table of Contents 1.0 General Description...................................................................................................................................................................... 5 2.0 PIC12F510/16F506 Device Varieties .......................................................................................................................................... 7 3.0 Architectural Overview ................................................................................................................................................................. 9 4.0 Memory Organization ................................................................................................................................................................. 15 5.0 I/O Port ....................................................................................................................................................................................... 27 6.0 TMR0 Module and TMR0 Register............................................................................................................................................. 39 7.0 Comparator(s) ............................................................................................................................................................................ 43 8.0 Comparator Voltage Reference Module (PIC16F506 only)........................................................................................................ 49 9.0 Analog-to-Digital (A/D) Converter............................................................................................................................................... 51 10.0 Special Features Of The CPU.................................................................................................................................................... 55 11.0 Instruction Set Summary ............................................................................................................................................................ 71 12.0 Development Support................................................................................................................................................................. 79 13.0 Electrical Characteristics ............................................................................................................................................................ 83 14.0 DC and AC Characteristics Graphs and Charts ......................................................................................................................... 96 15 ...
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... PIC12F510/16F506 NOTES: DS41268B-page 4 Preliminary © 2006 Microchip Technology Inc. ...
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... In-Circuit Serial Programming Number of Instructions Packages The PIC12F510/16F506 devices have Power-on Reset, selectable Watchdog Timer, selectable code-protect, high I/O current capability and precision internal oscillator. The PIC12F510/16F506 device uses serial programming with data pin RB0/GP0 and clock pin RB1/GP1. © 2006 Microchip Technology Inc. ...
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... PIC12F510/16F506 NOTES: DS41268B-page 6 Preliminary © 2006 Microchip Technology Inc. ...
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... A variety of packaging options are available. Depend- ing on application and production requirements, the proper device option can be selected using the information in this section. When placing orders, please use the PIC12F510/16F506 Product Identification System at the back of this data sheet to specify the correct part number. 2.1 ...
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... PIC12F510/16F506 NOTES: DS41268B-page 8 Preliminary © 2006 Microchip Technology Inc. ...
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... The PIC12F510/16F506 devices can directly or indi- rectly address its register files and data memory. All Special Function Registers (SFR), including the PC, are mapped in the data memory. The PIC12F510/ 16F506 devices have a highly orthogonal (symmetri- cal) instruction set that makes it possible to carry out any operation, on any register, using any addressing mode. This symmetrical nature and lack of “ ...
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... PIC12F510/16F506 FIGURE 3-1: PIC12F510 SERIES BLOCK DIAGRAM 10-11 Flash Program Memory Program 12 Bus Instruction Reg 8 Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2 MCLR DS41268B-page 10 8 Data Bus Program Counter RAM STACK 1 38 bytes STACK 2 File Registers RAM Addr 9 Addr MUX Indirect ...
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... TABLE 3-2: PIN DESCRIPTIONS – PIC12F510 Name I/O/P Type GP0/AN0/C1IN+/ICSPDAT GP0 AN0 C1IN+ ICSPDAT GP1/AN1/C1IN-/ICSPCLK GP1 AN1 C1IN- ICSPCLK GP2/AN2/T0CKI/C1OUT GP2 AN2 T0CKI C1OUT GP3/MCLR/V GP3 PP MCLR V PP GP4/OSC2 GP4 OSC2 GP5/OSC1/CLKIN GP5 OSC1 CLKIN Legend input output, I/O = input/output power, — = Not Used, TTL = TTL input Schmitt Trigger input Analog Voltage © ...
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... PIC12F510/16F506 FIGURE 3-2: PIC16F506 SERIES BLOCK DIAGRAM 10 Flash Program Memory Program 10 Bus Instruction Reg 8 Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2/CLKOUT MCLR DS41268B-page 12 8 Data Bus Program Counter RAM STACK 1 67 bytes STACK 2 File Registers RAM Addr 9 Addr MUX Indirect ...
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... Legend input output, I/O = input/output power, — = Not Used, TTL = TTL input Schmitt Trigger input Analog Voltage © 2006 Microchip Technology Inc. PIC12F510/16F506 Output Input Type Type TTL CMOS Bidirectional I/O port. Can be software pro- grammed for internal weak pull-up and wake-up from Sleep on pin change ...
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... PIC12F510/16F506 3.1 Clocking Scheme/Instruction Cycle The clock input (OSC1/CLKIN pin) is internally divided by four to generate four non-overlapping quadrature clocks, namely Q1, Q2, Q3 and Q4. Internally, the PC is incremented every Q1 and the instruction is fetched from program memory and latched into the instruction register in Q4 decoded and executed during the following Q1 through Q4 ...
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... For devices with more than 512 bytes of program memory, a paging scheme is used. Program memory pages are accessed using STATUS register bit PA0. For the PIC12F510 and PIC16F506, with data memory register files of more than 32 registers, a banking scheme is used. Data memory banks are accessed using the File Select Register (FSR) ...
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... I/O port configuration and prescaler options. The General Purpose Registers are used for data and control information under command of the instructions. For the PIC12F510, the register file is composed of 10 Special Function Registers, 6 General Purpose Registers and 32 General Purpose Registers accessed by banking (see Figure 4-2). ...
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... The Special Function Registers associated with the “core” functions are described in this section. Those related to the operation of the peripheral features are described in the section for each peripheral feature. TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY – PIC12F510 Address Name Bit 7 Bit 6 N/A ...
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... These bits are set or cleared according to the device logic. Furthermore, the TO and PD bits are not writable. Therefore, the result of an instruction with the STATUS register as destination may be different than intended. REGISTER 4-1: STATUS REGISTER (ADDRESS: 03h) (PIC12F510) R/W-0 GPWUF bit 7 bit 7 GPWUF: GPIO Reset bit ...
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... A borrow from the 4th low-order bit of the result occurred bit 0 C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions) ADDWF carry occurred carry did not occur Legend Readable bit -n = Value at POR © 2006 Microchip Technology Inc. PIC12F510/16F506 R/W-0 R/W-0 R-1 R-1 CWUF PA0 TO PD RRF or RLF: ...
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... TRIS overrides Option control of GPPU/RBPU and GPWU/RBWU the T0CS bit is set to ‘1’, it will override the TRIS function on the T0CKI pin. REGISTER 4-3: OPTION REGISTER (PIC12F510) W-1 GPWU GPPU bit 7 bit 7 GPWU: Enable Wake-up On Pin Change bit (GP0, GP1, GP3) ...
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... Prescaler assigned to Timer0 bit 2-0 PS<2:0>: Prescaler Rate Select bits Bit Value 000 001 010 011 100 101 110 111 Legend Readable bit -n = Value at POR © 2006 Microchip Technology Inc. PIC12F510/16F506 W-1 W-1 W-1 W-1 RBPU T0CS T0SE PSA Timer0 Rate WDT Rate ...
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... PIC12F510/16F506 4.5 OSCCAL Register The Oscillator Calibration (OSCCAL) register is used to calibrate the internal precision 4/8 MHz oscillator contains seven bits for calibration Note: Erasing the device will also erase the pre- programmed internal calibration value for the internal oscillator. The calibration value must be read prior to erasing the part so it can be reprogrammed correctly later ...
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... Stack The PIC12F510/16F506 devices have a 2-deep, 12-bit wide hardware PUSH/POP stack. A CALL instruction will PUSH the current value of Stack 1 into Stack 2 and then PUSH the current PC value, incremented by one, into Stack Level 1. If more than two sequential CALLs are executed, only the most recent two return addresses are stored ...
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... The FSR<4:0> bits are used to select data memory addresses 00h to 1Fh. PIC16F506 – Uses FSR<6:5>. Selects from Bank 0 to Bank 3. FSR<7> is unimplemented, read as ‘1’. PIC12F510 – Uses FSR<5>. Selects from Bank 0 to Bank 1. FSR<7:6> are unimplemented, read as ‘11’ Addresses map back to addresses in Bank 0 ...
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... Bank Select Location Select 00h Data 0Fh (1) Memory 10h Note 1: For register map detail, see Figure 4-3. © 2006 Microchip Technology Inc. PIC12F510/16F506 Addresses map back to addresses in Bank 0. 1Fh 3Fh 5Fh 7Fh Bank 0 Bank 1 Bank 2 ...
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... PIC12F510/16F506 NOTES: DS41268B-page 26 Preliminary © 2006 Microchip Technology Inc. ...
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... Input/Output modes. On Reset, all I/O ports are defined as input (inputs are at high-impedance) since the I/O control registers are all set. Note: On the PIC12F510, I/O PORTB is refer- enced as GPIO. On the PIC16F506, I/O PORTB is referenced as PORTB. 5.1 PORTB/GPIO PORTB/GPIO is an 8-bit I/O register. Only the low- order 6 bits are used (RB/GP< ...
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... PIC12F510/16F506 FIGURE 5-2: BLOCK DIAGRAM OF GP0/RB0 AND GP1/RB1 GPPU RBPU Data Bus D Q Data WR Latch Port Reg D Q TRIS Latch TRIS ‘f’ Reset ADC pin Ebl COMP pin Ebl RD Port Mis-Match ADC COMP Note 1: I/O pins have protection diodes ...
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... Q TRIS Latch TRIS ‘f’ Reset T0CS C1T0CS ADC Pin Enable RD Port T0CKI ADC Note 1: I/O pins have protection diodes © 2006 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-5: C1OUT (1) I/O Pin Data Bus D Data WR Latch Port CK C1OUTEN W Reg D TRIS Latch TRIS ‘f’ ...
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... PIC12F510/16F506 FIGURE 5-6: BLOCK DIAGRAM OF RB4 RBPU Data Bus Data WR Latch Port OSC W Reg D Q TRIS Latch TRIS ‘f’ Reset INTOSC/RC/EC CLKOUT Enable RD Port Oscillator OSC1 Circuit Note 1: I/O pins have protection diodes Input mode is disabled when pin is used for oscillator ...
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... TRIS ‘f’ Reset RD Port Oscillator OSC2 Circuit Note 1: I/O pins have protection diodes Input mode is disabled when pin is used for oscillator. © 2006 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-9: Data Bus D I/O (1) pin WR Port CK W Reg D TRIS ‘f’ CK (Note 2) ...
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... PIC12F510/16F506 FIGURE 5-10: BLOCK DIAGRAM OF RC2 VROE CV REF Data Bus D Q Data WR Latch Port Reg D Q TRIS Latch TRIS ‘f’ Reset RD Port COMP2 Note 1: I/O pins have protection diodes DS41268B-page 32 FIGURE 5-11: Data Bus D Data WR Latch 1 (1) I/O PIN Port ...
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... CK Q C2OUTEN W Reg D Q TRIS Latch TRIS ‘f’ Reset RD Port Note 1: I/O pins have protection diodes © 2006 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-13: (1) I/O Pin Data Bus D Data WR Latch Port CK W Reg D TRIS Latch TRIS ‘f’ CK Reset RD Port ...
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... AN0/C1IN+ AN1/C1IN- 2 TRISB TRISB 3 — — TABLE 5-3: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC16F506) Priority RC0 RC1 1 C2IN+ C2IN- 2 TRISC TRISC TABLE 5-4: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC12F510) Priority GP0 GP1 1 AN0/C1IN+ AN1/C1IN- 2 TRISIO TRISIO 3 — — 4 — — DS41268B-page 34 Bit 5 Bit 4 Bit 3 Bit 2 ...
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... TABLE 5-5: REQUIREMENTS FOR DIGITAL PIN OPERATION (PIC12F510) GP0 GP0 CM1CON0 C1ON 0 1 C1PREF — 0 C1NREF — — C1T0CS — — C1OUTEN — — CM2CON0 C2ON — — C2PREF1 — — C2PREF2 — — C2NREF — — C2OUTEN — — VRCON0 VROE — ...
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... PIC12F510/16F506 TABLE 5-6: REQUIREMENTS FOR DIGITAL PIN OPERATION (PIC16F506 PORTB) RB0 RB0 CM1CON0 C1ON — 0 C1PREF — — C1NREF — — C1T0CS — — C1OUTEN — — CM2CON0 C2ON — 1 C2PREF1 — 0 C2PREF2 — 1 C2NREF — — C2OUTEN — — OPTION T0CS — ...
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... Instruction Fetched MOVWF PORTB MOVF PORTB, W RB<5:0> Port pin written here Instruction Executed MOVWF PORTB (Write to PORTB) © 2006 Microchip Technology Inc. PIC12F510/16F506 EXAMPLE 5-1: ;Initial PORTB Settings ;PORTB<5:3> Inputs ;PORTB<2:0> Outputs ; ; ; BCF PORTB, 5 ;--01 -ppp BCF PORTB, 4 ;--10 -ppp MOVLW 007h; ...
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... PIC12F510/16F506 NOTES: DS41268B-page 38 Preliminary © 2006 Microchip Technology Inc. ...
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... The prescaler is shared with the Watchdog Timer (Figure 6-5). 3: Bit C1T0CS is located in the CM1CON0 register, CM1CON0<4>. © 2006 Microchip Technology Inc. PIC12F510/16F506 The second Counter mode uses the output of the com- parator to increment Timer0. It can be entered in two different ways. The first way is selected by setting the T0CS bit (OPTION< ...
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... GPWU GPPU (1) N/A TRISGPIO — — Legend: Shaded cells not used by Timer0, – = unimplemented unknown unchanged. Note 1: The TRIS of the T0CKI pin is overridden when T0CS = 1. 2: For PIC12F510. 3: For PIC16F506. DS41268B-page NT0 Read TMR0 Read TMR0 Write TMR0 ...
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... WDT and vice-versa. The PSA and PS<2:0> bits (OPTION<3:0>) determine prescaler assignment and prescale ratio. © 2006 Microchip Technology Inc. PIC12F510/16F506 When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type prescaler, so that the prescaler output is symmetrical. ...
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... Timer WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register. 2: T0CKI is shared with pin GP2 on the PIC12F510 and shared with RC5 on the PIC16F506. 3: Bit C1T0CS is located in the CM1CON0 register. DS41268B-page 42 To change prescaler from the WDT to the Timer0 module, use the sequence shown in Example 6-2 ...
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... COMPARATOR(S) The PIC12F510 contains one analog comparator module. The PIC16F506 contains two comparators and a comparator voltage reference. REGISTER 7-1: CM1CON0 REGISTER (ADDRESS: 07h) (PIC12F510) R-1 R/W-1 C1OUT C1OUTEN bit 7 bit 7 C1OUT: Comparator Output bit > < bit 6 C1OUTEN: Comparator Output Enable bit ...
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... PIC12F510/16F506 REGISTER 7-2: CM1CON0 REGISTER (ADDRESS: 08h) (PIC16F506) R-1 R/W-1 C1OUT C1OUTEN bit 7 bit 7 C1OUT: Comparator Output bit > < bit 6 C1OUTEN: Comparator Output Enable bit 1 = Output of comparator is NOT placed on the C1OUT pin 0 = Output of comparator is placed in the C1OUT pin bit 5 ...
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... Wake-up on Comparator change is enabled. Note 1: Overrides TOCS bit for TRIS control of RC4. 2: When comparator is turned on, these control bits assert themselves. Otherwise, the other registers have precedence. Legend Readable bit -n = Value at POR © 2006 Microchip Technology Inc. PIC12F510/16F506 R/W-1 R/W-1 R/W-1 R/W-1 C2POL C2PREF2 C2ON C2NREF C2PREF1 ...
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... PIC12F510/16F506 FIGURE 7-1: COMPARATOR 1 BLOCK DIAGRAM FOR PIC12F510/16F506 C1PREF C1IN- 0 C1IN+ 1 C1NREF C1IN- 1 0.6 V REF 0 Note 1: When C1ON = 0, the comparator, C1, will produce a ‘0’ output to the XOR Gate. FIGURE 7-2: COMPARATOR 2 BLOCK DIAGRAM (PIC16F506 ONLY) C2PREF1 C2PREF2 1 C2IN+ 1 C1IN C2IN- C2NREF C2IN- ...
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... The comparator output is read through the CM1CON0 or CM2CON0 register. This bit is read-only. The comparator output may also be used externally, see Figure 7-3. © 2006 Microchip Technology Inc. PIC12F510/16F506 Note: Analog levels on any pin that is defined as a digital input may cause the input buffer to consume more current than is specified. ...
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... C2OUTEN (2) N/A TRISB — — (2) N/A TRISC — — (1) N/A TRISGPIO — — Legend Unknown Unchanged, – = Unimplemented, read as ‘0’ Depends on condition. Note 1: PIC12F510 only. 2: PIC16F506 only. DS41268B-page 0. LEAKAGE V = 0.6V T ±500 Input Capacitance = Threshold Voltage = Leakage Current at the Pin ...
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... This allows the comparator to detect a zero-crossing and not consume the CV module current. The voltage reference is V the CV output changes with fluctuations in V REF tested absolute accuracy of the comparator voltage ref- erence can be found in Section 13.2 “DC Character- istics: PIC12F510/16F506 (Extended)”. DD /32) DD R/W-1 U-0 R/W-1 VRR — ...
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... PIC12F510/16F506 FIGURE 8-1: COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM 16-1 Analog VREN CV to REF Comparator 2 Input VR3:VR0 RC2/V REF V ROE TABLE 8-1: REGISTERS ASSOCIATED WITH COMPARATOR VOLTAGE REFERENCE Add Name Bit 7 Bit 6 0Ch VRCON VREN VROE (1) 08h CM1CON0 C1OUT C1OUTEN (1) 0Bh CM2CON0 C2OUT C2OUTEN Legend unknown unchanged, – ...
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... ADC will see the analog voltage on the pin. © 2006 Microchip Technology Inc. PIC12F510/16F506 Note the users responsibility to ensure that use of the ADC and comparator simulta- ...
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... PIC12F510/16F506 9.1.5 SLEEP This ADC does not have a dedicated ADC clock, and therefore, no conversion in Sleep is possible conversion is underway and a Sleep command is executed, the GO/DONE and ADON bit will be cleared. This will stop any conversion in process and power- down the ADC module to conserve power. Due to the nature of the conversion process, the ADRES may con- tain a partial conversion ...
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... ADC module is operating 0 = ADC module is shut-off and consumes no power Note 1: On the PIC16F506, the term is RBx, on PIC12F510, the term is GPx. 2: When the ANS bits are set, the channels selected will automatically be forced into Analog mode, regardless of the pin function previously defined. The only exception to this is the com- parator, where the analog input to the comparator and the ADC will be active at the same time ...
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... PIC12F510/16F506 REGISTER 9-2: ADRES REGISTER R-X R-X ADRES7 ADRES6 ADRES5 bit 7 Legend Readable bit -n = Value at POR EXAMPLE 9-1: PERFORMING AN ANALOG-TO-DIGITAL CONVERSION ;Sample code operates out of BANK0 MOVLW 0xF1 ;configure A/D MOVWF ADCON0 BSF ADCON0, 1 ;start conversion loop0 BTFSC ADCON0, 1;wait for ‘DONE’ GOTO loop0 MOVF ADRES, W ...
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... Configuration bits can be programmed to select various device configurations. Three bits are for the selection of the oscillator type; (two bits on the PIC12F510), one bit is the Watchdog Timer enable bit, one bit is the MCLR enable bit and one bit is for code protection (Register 10-1, Register 10-2). ...
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... XT oscillator with 18 ms DRT 10 = INTOSC with 1.125 ms DRT 11 = EXTRC with 1.125 ms DRT Note 1: Refer to the “PIC12F510 Memory Programming Specification”, DS41257 to determine how to access the Configuration Word the responsibility of the application designer to ensure the use of the 1.125 ms (nominal) DRT will result in acceptable operation. Refer to Electrical Specifications for V stability requirements for this mode of operation ...
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... DRT will result in acceptable operation. Refer to Electrical Specifications for V stability requirements for this mode of operation. Legend Readable bit W = Writable bit -n = bLANK ‘1’ = bit is set © 2006 Microchip Technology Inc. PIC12F510/16F506 — IOSCFS MCLRE CP WDTE Unimplemented bit, read as ‘0’ ‘0’ = bit is cleared ...
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... PIC12F510/16F506 10.2 Oscillator Configurations 10.2.1 OSCILLATOR TYPES The PIC12F510/16F506 devices can be operated six different oscillator modes. The user can program up to three Configuration bits [PIC12F510], FOSC<2:0> [PIC16F506]). To select one of these modes: •LP: Low-Power Crystal •XT: Crystal/Resonator •HS: High-Speed Crystal/Resonator (PIC16F506 only) •INTOSC: Internal 4/8 MHz Oscillator • ...
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... C values. The user also needs to take into account EXT variation due to tolerance of external R and C components used. Figure 10-5 shows how the R/C combination is connected to the PIC12F510/16F506 devices. For R values below 5 the oscillator operation may EXT become unstable or stop completely. For very high R values (e.g the oscillator becomes EXT sensitive to noise, humidity and leakage ...
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... The calibration value must be read prior to erasing the part so it can be reprogrammed correctly later. For the PIC12F510/16F506 devices, only bits <7:1> of OSCCAL are implemented. Bits CAL6-CAL0 are used for calibration. Adjusting CAL6-CAL0 from ‘0000000’ to ‘1111111’ Register 4-3 for more information. ...
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... PD, CWUF and RBWUF/GPWUF bits. They are set or cleared differently in different Reset situations. These bits are used in software to determine the nature of Reset. See Table 10-4 for a full description of Reset states of all registers. TABLE 10-3: RESET CONDITIONS FOR REGISTERS – PIC12F510 Register Address W — INDF ...
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... PIC12F510/16F506 TABLE 10-4: RESET CONDITIONS FOR REGISTERS – PIC16F506 Register Address W — INDF 00h TMR0 01h PCL 02h STATUS 03h FSR 04h OSCCAL 05h PORTB 06h PORTC 07h CM1CON0 08h ADCON0 09h ADRES 0Ah CM2CON0 0Bh VRCON 0Ch OPTION — TRISB — ...
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... GPWU/RBWU (GP3/RB3)/MCLR/V MCLRE 10.4 Power-on Reset (POR) The PIC12F510/16F506 devices incorporate an on- chip Power-on Reset (POR) circuitry, which provides an internal chip Reset for most power-up situations. The on-chip POR circuit holds the chip in Reset until V has reached a high enough level for proper oper- DD ation ...
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... PIC12F510/16F506 FIGURE 10-8: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT V DD Power-up Detect (GP3/RB3)/MCLR/V PP MCLRE WDT Reset WDT Time-out Pin Change Sleep Wake-up on pin Change Reset Comparator Change Wake-up on Comparator Change FIGURE 10-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR PULLED LOW MCLR Internal POR ...
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... DD MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 © 2006 Microchip Technology Inc. PIC12F510/16F506 V1 TDRT time-out expires long before V DRT DD Preliminary ): SLOW V RISE DD DD has reached its final V min ...
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... PIC12F510/16F506 10.5 Device Reset Timer (DRT) On the PIC12F510/16F506 devices, the DRT runs any time the device is powered up. DRT runs from Reset and varies based on oscillator selection and Reset type (see Table 10-6). The DRT operates from a free running on-chip oscilla- tor that is separate from INTOSC. The processor is kept in Reset as long as the DRT is active ...
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... Bit 7 Bit 6 (1) N/A OPTION GPWU GPPU T0CS (2) N/A OPTION RBWU RBPU Legend: Shaded boxes = Not used by Watchdog Timer. – = unimplemented, read as ‘0’ unchanged. Note 1: PIC12F510 only. 2: PIC16F506 only. © 2006 Microchip Technology Inc. PIC12F510/16F506 0 M Postscaler Postscaler 8-to-1 MUX PSA To Timer0 ...
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... A brown-out is a condition where device power (V dips below its minimum value, but not to zero, and then recovers. The device should be reset in the event of a brown-out. To reset PIC12F510/16F506 devices when a brown- out occurs, external brown-out protection circuits may be built, as shown in Figure 10-13 and Figure 10-14. FIGURE 10-13: ...
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... The first 64 locations and the last location (OSCCAL) can be read, regardless of the code protection bit setting. The last memory location can be read regardless of the code protection bit setting on the PIC12F510/16F506 devices. 10.11 ID Locations Four memory locations are designated as ID locations where the user can store checksum or other code identification numbers ...
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... After Reset, a 6-bit command is supplied to the device. Depending on the command and if the command was a Load or a Read, 14 bits of program data are then sup- plied to or from the device. For complete details of serial programming, please refer to the PIC12F510/16F506 Programming Specifications. A typical In-Circuit Serial Programming connection is shown in Figure 10-16. ...
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... In the set of italics User defined term (font is courier) © 2006 Microchip Technology Inc. PIC12F510/16F506 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...
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... PIC12F510/16F506 TABLE 11-2: INSTRUCTION SET SUMMARY Mnemonic, Description Operands ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW – Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 IORWF ...
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... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W regis- ter. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2006 Microchip Technology Inc. PIC12F510/16F506 BCF Bit Clear f Syntax: [ label ] BCF Operands: ...
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... PIC12F510/16F506 BTFSS Bit Test f, Skip if Set Syntax: [ label ] BTFSS f,b Operands < 7 Operation: skip if (f<b> Status Affected: None Description: If bit ‘b’ in register ‘f’ is ‘1’, then the next instruction is skipped. If bit ‘b’ is ‘1’, then the next instruc- ...
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... PC<10:9> Status Affected: None Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS <6:5>. GOTO is a two- cycle instruction. © 2006 Microchip Technology Inc. PIC12F510/16F506 INCF Increment f Syntax: [ label ] Operands [0,1] ...
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... PIC12F510/16F506 IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d Operands [0,1] Operation: (W).OR. (f) (dest) Status Affected: Z Description: Inclusive OR the W register with register ‘f’. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘ ...
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... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. register ‘f’ C © 2006 Microchip Technology Inc. PIC12F510/16F506 SLEEP Enter SLEEP Mode Syntax: [label ] Operands: None Operation: ...
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... PIC12F510/16F506 TRIS Load TRIS Register Syntax: [ label ] TRIS f Operands Operation: (W) TRIS register f Status Affected: None Description: TRIS register ‘f’ loaded with the contents of the W register XORLW Exclusive OR literal with W Syntax: [label ] XORLW k Operands 255 Operation: (W) .XOR. k ...
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... PICSTART Plus Development Programmer - MPLAB PM3 Device Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2006 Microchip Technology Inc. PIC12F510/16F506 12.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...
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... PIC12F510/16F506 12.2 MPASM Assembler The MPASM Assembler is a full-featured, universal macro assembler for all PICmicro MCUs. The MPASM Assembler generates relocatable object files for the MPLINK Object Linker, Intel files, MAP files to detail memory usage and symbol reference, absolute LST files that contain source lines and generated machine code and COFF files for debugging ...
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... The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application. © 2006 Microchip Technology Inc. PIC12F510/16F506 12.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, low-cost, ...
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... PIC12F510/16F506 12.11 PICSTART Plus Development Programmer The PICSTART Plus Development Programmer is an easy-to-use, low-cost, prototype programmer. It connects to the PC via a COM (RS-232) port. MPLAB Integrated Development Environment software makes using the programmer simple and efficient. The PICSTART Plus Development Programmer supports most PICmicro devices in DIP packages pins. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2006 Microchip Technology Inc. PIC12F510/16F506 ............................................................................... -0. > ...
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... PIC12F510/16F506 VOLTAGE-FREQUENCY GRAPH, -40 C FIGURE 13-1: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC12F510) FIGURE 13- EXTRC INTOSC 0 DS41268B-page Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz) Preliminary +125 C (PIC12F510 MHz © 2006 Microchip Technology Inc. ...
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... VOLTAGE FREQUENCY GRAPH, -40 C FIGURE 13-3: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC16F506) FIGURE 13- EXTRC INTOSC © 2006 Microchip Technology Inc. PIC12F510/16F506 Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz) Preliminary +125 C (PIC16F506 MHz DS41268B-page 85 ...
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... PIC12F510/16F506 DC Characteristics: PIC12F510/16F506 (Industrial) 13.1 DC CHARACTERISTICS Parm Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention DR (2) Voltage D003 V V Start Voltage to POR DD ensure Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3) D010 I Supply Current DD D020 I Power-Down Current PD (5) D022 ...
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... DC Characteristics: PIC12F510/16F506 (Extended) DC CHARACTERISTICS Parm Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention DR (2) Voltage D003 V V Start Voltage to POR DD ensure Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3) D010 I Supply Current DD D020 I Power-Down Current PD (5) D022 I WDT Current ...
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... Data in “Typ” column unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input not recommended that the PIC12F510/16F506 be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level ...
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... COMPARATOR VOLTAGE REFERENCE (V Sym Characteristics CV Resolution RES Absolute Accuracy Unit Resistor Value (R) (1) Settling Time * These parameters are characterized but not tested. Note 1: Settling time measured while V TABLE 13-3: A/D CONVERTER CHARACTERISTICS (PIC12F510/16F506) Param Sym Characteristic No. A01 N Resolution R A03 E Integral Error IL A04 E Differential Error ...
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... PIC12F510/16F506 TABLE 13-4: A/D CONVERTER CHARACTERISTICS (PIC12F510) Param Sym Characteristic No. A01 N Resolution R A03 E Integral Error IL A04 E Differential Error DL A05 E Full-scale Range FS A06 E Offset Error OFF A07 E Gain Error GN A10 — Monotonicity A25 V Analog Input Voltage AIN A30 Z Recommended Impedance AIN of Analog Voltage Source * These parameters are characterized but not tested ...
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... I/O port Uppercase letters and their meanings Fall H High I Invalid (High-impedance) L Low FIGURE 13-5: LOAD CONDITIONS Pin FIGURE 13-6: EXTERNAL CLOCK TIMING Q4 OSC1 © 2006 Microchip Technology Inc. PIC12F510/16F506 T Time mc MCLR osc Oscillator os OSC1 t0 T0CKI wdt Watchdog Timer P Period R Rise V Valid Z High-impedance Legend: ...
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... PIC12F510/16F506 TABLE 13-5: EXTERNAL CLOCK TIMING REQUIREMENTS AC CHARACTERISTICS Para Sym Characteristic No External CLKIN Frequency OSC Oscillator Frequency 1 T External CLKIN Period OSC Oscillator Period 2 T Instruction Cycle Time CY 3 TosL, Clock in (OSC1) Low or High TosH Time 4 TosR, Clock in (OSC1) Rise or Fall ...
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... OSC1 I/O Pin (input) I/O Pin Old Value (output) Note: All tests must be done with specified capacitive loads (see data sheet I/O pins and CLKOUT. © 2006 Microchip Technology Inc. PIC12F510/16F506 Standard Operating Conditions (unless otherwise specified) Operating Temperature - - Freq. ...
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... PIC12F510/16F506 TABLE 13-7: TIMING REQUIREMENTS Standard Operating Conditions (unless otherwise specified) AC CHARACTERISTICS Operating Temperature Param Sym No OSC1 (Q1 cycle) to Port out valid OSC1 (Q2 cycle) to Port input invalid OS IO (I/O in hold time Port input valid to OSC1 (I/O in setup time) ...
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... These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. © 2006 Microchip Technology Inc. PIC12F510/16F506 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40 C (1) Min ...
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... PIC12F510/16F506 14.0 DC AND AC CHARACTERISTICS GRAPHS AND CHARTS Graphs and charts are not available at this time. DS41268B-page 96 Preliminary © 2006 Microchip Technology Inc. ...
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... NOTES: © 2006 Microchip Technology Inc. PIC12F510/16F506 Preliminary DS41268B-page 97 ...
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... For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. DS41268B-page 98 Example 12F510/P 017 0410 Example PIC16F506-I/P 0410017 Example PIC12F510-I /SN0410 017 Preliminary © 2006 Microchip Technology Inc ...
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... Package Marking Information (Cont’d) 14-Lead SOIC (.150”) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 8-Lead MSOP XXXXXX YWWNNN 14-Lead TSSOP XXXXXXXX YYWW NNN © 2006 Microchip Technology Inc. PIC12F510/16F506 Example PIC16F506 -I/SL 0410017 Example 602/MS 310017 Example 16F506/ST Preliminary 0410 017 DS41268B-page 99 ...
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... PIC12F510/16F506 8-Lead Plastic Dual In-Line (P) – 300 mil (PDIP Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width ...
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... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-005 © 2006 Microchip Technology Inc. PIC12F510/16F506 Units ...
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... PIC12F510/16F506 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC Units Dimension Limits n Number of Pins p Pitch Overall Height A Molded Package Thickness A2 Standoff § A1 Overall Width E Molded Package Width E1 Overall Length D Chamfer Distance h Foot Length L Foot Angle c Lead Thickness ...
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... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 © 2006 Microchip Technology Inc. PIC12F510/16F506 ...
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... PIC12F510/16F506 8-Lead Plastic Micro Small Outline Package (MS) (MSOP Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint (Reference) Foot Angle Lead Thickness Lead Width Mold Draft Angle Top ...
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... Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M JEDEC Equivalent: MO-153 AB-1 Drawing No. C04-087 © 2006 Microchip Technology Inc. PIC12F510/16F506 Units ...
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... REVISION HISTORY Revision A Original release. Revision B Page 3 – Special Microcontroller Features and Low- Power Features sections. PIC12F510 Pin Diagram. Section 3.0 – Figure 3-1, Figure 3-2, Table 3-2, Table 3-3. Section 4.0 – First paragraph, Section 4.2 - Figure references, Tables 4-1 and 4-2 (Note 1). Section 5.0 – Table 5-2, Table 5-6 Title. Section 6.0 Section 7.0 – ...
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... MPLINK Object Linker/MPLIB Object Librarian .................. 80 O OPTION Register................................................................ 20 OSC Selection .................................................................... 55 OSCCAL Register............................................................... 22 Oscillator Configurations..................................................... 58 Oscillator Types HS............................................................................... 58 LP ............................................................................... 58 RC .............................................................................. 58 XT ............................................................................... 58 P PIC12F510/16F506 Device Varieties ................................... 7 PICSTART Plus Development Programmer....................... 82 POR Device Reset Timer (DRT) ................................... 55, 66 PD............................................................................... 68 Power-on Reset (POR)............................................... 55 TO............................................................................... 68 PORTB ............................................................................... 27 Power-down Mode.............................................................. 69 Prescaler ............................................................................ 41 Program Counter ................................................................ cycles ...
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... PIC12F510/16F506 Timing Parameter Symbology and Load Conditions........... 91 TRIS Registers.................................................................... 27 W Wake-up from Sleep ........................................................... 69 Watchdog Timer (WDT) ................................................ 55, 66 Period.......................................................................... 66 Programming Considerations ..................................... 66 WWW Address.................................................................. 108 WWW, On-Line Support........................................................ 3 Z Zero bit .................................................................................. 9 DS41268B-page 108 Preliminary © 2006 Microchip Technology Inc. ...
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... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2006 Microchip Technology Inc. PIC12F510/16F506 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC12F510/16F506 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
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... L = PLCC SO = SOIC SP = Skinny Plastic DIP P = PDIP Pattern: QTP, SQTP, Code or Special Requirements (blank otherwise) © 2006 Microchip Technology Inc. PIC12F510/16F506 XXX Examples: Pattern a) PIC18LF258 - I/L 301 = Industrial temp., PLCC package, Extended V #301. b) PIC18LF458 - I/PT = Industrial temp., TQFP package, Extended V (1) (2) , PIC18F248/258T , c) PIC18F258 - E/L = Extended temp., PLCC ...
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W ORLDWIDE AMERICAS ASIA/PACIFIC Corporate Office Australia - Sydney 2355 West Chandler Blvd. Tel: 61-2-9868-6733 Chandler, AZ 85224-6199 Fax: 61-2-9868-6755 Tel: 480-792-7200 China - Beijing Fax: 480-792-7277 Tel: 86-10-8528-2100 Technical Support: Fax: 86-10-8528-2104 http://support.microchip.com China - Chengdu Web Address: Tel: ...