HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 26

IC SUPERH MCU ROMLESS 144QFP

HD6417041AVF16V

Manufacturer Part Number
HD6417041AVF16V
Description
IC SUPERH MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7040r
Datasheets

Specifications of HD6417041AVF16V

Core Processor
SH-2
Core Size
32-Bit
Speed
28.7MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417041AVF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 2 Register Configuration
Table 2.1
Bits
27–16
11
10
9
8
7–4
3–2
1
0
31–28,
15–12
Dedicated load and store instructions are used to access the RS, RE, and MOD registers. For
example, to access the RS register, do the following:
Rev. 5.00 Jun 30, 2004 page 10 of 512
REJ09B0171-0500O
LDC
LDC.L @Rm+, RS;
STC
STC.L RS, @-Rn;
Name
Repeat counter (RC)
Specification of modulo
addressing for Y pointer
(DMY)
Specification of modulo
addressing for X pointer
(DMX)
Bit M
Bit Q
Interrupt request mask
(IMASK)
Repeat flag (RF1, RF0)
Saturation operation bit
(S)
Bit T
Reserved
Rm,
RS, Rn;
SR Register Bits
RS; Rm
(Rm)
RS
Rn-4
Rn
Function
Specifies the number of iterations for repeat (loop) control (2
to 4095)
1: Modulo addressing mode becomes valid for the Y memory
address register Ay (R6, R7)
1: Modulo addressing mode becomes valid for the X memory
address register Ax (R4, R5)
Used by the DIV0S/U and DIV1 instructions
Indicate the level of interrupt request accepted (0-15)
Used to control zero-overhead repeating (loop)
00: 1 step repeat
01: 2 step repeat
11: 3 step repeat
10: Repeat of 4 or more steps
Used by MAC and DSP instructions
1: Specifies saturation operation (prevents overflows)
For MOVT, CMP/cond, TAS, TST, BT, BF, SETT, CLRT, and
DT instructions:
0: FALSE
1: TRUE
For ADDV/C, SUBV/C, DIV0U/S, DIV1, NEGC, SHAR/L,
SHLR/L, ROTR/L and ROTCR/L instructions:
1: Indicates a carry, borrow, overflow or underflow
0: Always reads 0; Always write 0.
RS, Rm+4
Rn, RS
RS
(Rn)
Rm

Related parts for HD6417041AVF16V