HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 123

• Manufacturer Part Number: HD6417041AVF16V
• Description: IC SUPERH MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7040r

Specifications of HD6417041AVF16V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 28.7MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Note:
Instruction
STS
STS
STS
STS
STS
STS
STS.L
STS.L
STS.L
STS.L
STS.L
STS.L
STS.L
STS.L
STS.L
TRAPA
* The number of execution states before the chip enters the sleep state. This table lists
DSR,Rn
A0,Rn
X0,Rn
X1,Rn
Y0,Rn
Y1,Rn
MACH,@-Rn
MACL,@-Rn
PR,@-Rn
DSR,@-Rn
A0,@-Rn
X0,@-Rn
X1,@-Rn
Y0,@-Rn
Y1,@-Rn
#imm
the minimum execution cycles. In practice, the number of execution cycles increases
when the instruction fetch is in contention with data access or when the destination
register of a load instruction (memory
the next instruction, or when the branch destination address of a branch instruction is a
4n + 2 address.
Operation
DSR Rn
A0 Rn
X0 Rn
X1 Rn
Y0 Rn
Y1 Rn
Rn–4 Rn,MACH (Rn)
Rn–4 Rn,MACL (Rn)
Rn–4 Rn,PR (Rn)
Rn–4 Rn,DSR (Rn)
Rn–4 Rn,A0 (Rn)
Rn–4 Rn,X0 (Rn)
Rn–4 Rn,X1 (Rn)
Rn–4 Rn,Y0 (Rn)
Rn–4 Rn,Y1 (Rn)
PC/SR stack area,
(imm
4+VBR) PC
register) is the same as the register used by
Rev. 5.00 Jun 30, 2004 page 107 of 512
Cycles
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
T Bit
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Section 5 Instruction Set
SH-1
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REJ09B0171-0500O
Instructions
Applicable
SH-2
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SH-
DSP