MC9S12HZ256CAL Freescale Semiconductor, MC9S12HZ256CAL Datasheet - Page 148
MC9S12HZ256CAL
Manufacturer Part Number
MC9S12HZ256CAL
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12HZ128CAL.pdf
(692 pages)
Specifications of MC9S12HZ256CAL
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12H
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Quantity
Price
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Chapter 4 Port Integration Module (PIM9HZ256V2)
4.3.6
Port T is associated with the 8-channel timer (TIM) and the liquid crystal display (LCD) driver. Each pin
is assigned to these modules according to the following priority:
LCD Driver > timer > general-purpose I/O.
If the corresponding LCD frontplane drivers are enabled (and LCD module is enabled), the FP[27:24]
outputs of the LCD module are available on port T pins PT[3:0].
If the corresponding LCD frontplane drivers are disabled (or LCD module is disabled) and the timer is
enabled, the timer channels configured for output compare are available on port T pins PT[3:0].
Refer to the LCD block description chapter for information on enabling and disabling the LCD and its
frontplane drivers.Refer to the TIM block description chapter for information on enabling and disabling
the TIM module.
During reset, port T pins are configured as inputs with pull down.
4.3.6.1
Read: Anytime. Write: Anytime.
If the associated data direction bit (DDRTx) is set to 1 (output), a read returns the value of the I/O register
bit.
If the associated data direction bit (DDRTx) is set to 0 (input) and the LCD frontplane driver is enabled
(and LCD module is enabled), the associated I/O register bit (PTTx) reads “1”.
If the associated data direction bit (DDRTx) is set to 0 (input) and the LCD frontplane driver is disabled
(or LCD module is disabled), a read returns the value of the pin.
148
Reset
LCD:
TIM:
W
R
Port T
PTT7
OC7
Port T I/O Register (PTT)
0
7
PTT6
OC6
0
6
Figure 4-37. Port T I/O Register (PTT)
PTT5
MC9S12HZ256 Data Sheet, Rev. 2.05
OC5
0
5
PTT4
OC4
0
4
PTT3
OC3
1
0
3
PTT2
OC2
0
2
1
Freescale Semiconductor
PTT1
OC1
0
1
1
PTT0
OC0
1
0
0
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