DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 125
DF2328BVF25V
Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of DF2328BVF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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2.2.29 (1)
EEPMOV (MOVe data to EEPROM)
Operation
if R4L
else next;
Assembly-Language Format
EEPMOV.B
Operand Size
—
Description
This instruction performs a block data transfer. It moves data from the memory location specified
in ER5 to the memory location specified in ER6, increments ER5 and ER6, decrements R4L, and
repeats these operations until R4L reaches zero. Execution then proceeds to the next instruction.
The data transfer is performed a byte at a time, with R4L indicating the number of bytes to be
transferred. The byte symbol in the assembly-language format designates the size of R4L (and
limits the maximum number of bytes that can be transferred to 255). No interrupts are detected
while the block transfer is in progress.
When the EEPMOV.B instruction ends, R4L contains 0 (zero), and ER5 and ER6 contain the last
transfer address + 1.
Operand Format and Number of States Required for Execution
Note: * n is the initial value of R4L. Although n bytes of data are transferred, 2(n + 1) data accesses are
Notes
This instruction first reads the memory locations indicated by ER5 and ER6, then carries out the
block data transfer.
Addressing
repeat @ER5+
until R4L = 0
Mode
—
performed, requiring 2(n + 1) states. (n = 0, 1, 2, …, 255).
0 then
R4L – 1
EEPMOV (B)
EEPMOV.B
Mnemonic
@ER6+
R4L
Operands
1st byte
7
B
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
2nd byte
5
Instruction Format
Rev. 4.00 Feb 24, 2006 page 109 of 322
—
I
C
UI H
—
Section 2 Instruction Descriptions
—
3rd byte
5
—
U
9
—
N
Block Data Transfer
4th byte
8
REJ09B0139-0400
—
Z
F
— —
V
4 + 2n *
States
No. of
C
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