M38507F8AFP#U1 Renesas Electronics America, M38507F8AFP#U1 Datasheet - Page 23

• Manufacturer Part Number: M38507F8AFP#U1
• Description: IC 740/3850 MCU FLASH 42SSOP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38507F8AFP#U1

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 42-SSOP
• Package: 42SSOP
• Family Name: 740
• Maximum Speed: 12.5 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 34
• Interface Type: UART
• On-chip Adc: 9-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3850 Group (Spec.A QzROM version)
Rev.2.13
REJ03B0125-0213
Fig 15. Interrupt control
Fig 16. Structure of interrupt-related registers
b7
b7
b7
Interrupt request bit
Interrupt enable bit
Apr 17, 2009
b0
b0
b0
Interrupt disable flag (I)
Interrupt request register 1
(ICON1 : address 003E
(IREQ1 : address 003C
Interrupt control register 1
Interrupt edge selection register
(INTEDGE : address 003A
INT
Reserved (Do not write “1” to this bit.)
INT
INT
INT
Reserved (Do not write “1” to this bit.)
Timer X interrupt enable bit
Timer Y interrupt enable bit
INT
Reserved
INT
INT
INT
Reserved
Timer X interrupt request bit
Timer Y interrupt request bit
0 : Interrupts disabled
1 : Interrupts enabled
INT
INT
INT
INT
Serial I/O2 / INT
Not used (returns “0” when read)
0 : No interrupt request issued
1 : Interrupt request issued
0 : INT
1 : Serial I/O2 interrupt selected
0
1
2
3
0
1
2
3
0
1
2
3
interrupt enable bit
interrupt enable bit
interrupt enable bit
/ Serial I/O2 interrupt enable bit
interrupt request bit
interrupt request bit
interrupt request bit
/ Serial I/O2 interrupt request bit
interrupt edge selection bit
interrupt edge selection bit
interrupt edge selection bit
interrupt edge selection bit
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3
interrupt selected
3
interrupt source bit
16
16
)
)
16
BRK instruction
)
0 : Falling edge active
1 : Rising edge active
Reset
b7
b7
b0
b0
Interrupt control register 2
Interrupt request register 2
(ICON2 : address 003F
(IREQ2 : address 003D
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Serial I/O1 reception interrupt enable bit
Serial I/O1 transmit interrupt enable bit
CNTR
CNTR
AD converter interrupt enable bit
Not used (returns “0” when read)
(Do not write “1” to this bit.)
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Serial I/O1 reception interrupt request bit
Serial I/O1 transmit interrupt request bit
CNTR
CNTR
AD converter interrupt request bit
Not used (returns “0” when read)
0 : Interrupts disabled
1 : Interrupts enabled
0 : No interrupt request issued
1 : Interrupt request issued
0
1
0
1
interrupt enable bit
interrupt enable bit
interrupt request bit
interrupt request bit
Interrupt request
16
16
)
)