C8051F902-GU Silicon Laboratories Inc, C8051F902-GU Datasheet - Page 235
![IC MCU 8BIT 8KB FLASH 24QSOP](/photos/12/15/121586/c8051f9xx_24-qsop_sml.jpg)
C8051F902-GU
Manufacturer Part Number
C8051F902-GU
Description
IC MCU 8BIT 8KB FLASH 24QSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F902-GU
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QSOP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 15x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
768 B
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F912DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Package
24QSOP
Device Core
8051
Family Name
C8051F90x
Maximum Speed
25 MHz
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1849-5
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F902-GU
Manufacturer:
SEMIKRON
Quantity:
45
Company:
Part Number:
C8051F902-GU
Manufacturer:
Silicon Laboratories Inc
Quantity:
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ARBLOST
TXMODE
MASTER
ACKRQ
STO
ACK
STA
Bit
SI
• A START is generated.
• START is generated.
• SMB0DAT is written before the start of an
• A START followed by an address byte is
• A STOP is detected while addressed as a
• Arbitration is lost due to a detected STOP.
• A byte has been received and an ACK
• A repeated START is detected as a MASTER
• SCL is sensed low while attempting to gener-
• SDA is sensed low while transmitting a 1
• The incoming ACK value is low
• A START has been generated.
• Lost arbitration.
• A byte has been transmitted and an
• A byte has been received.
• A START or repeated START followed by a
• A STOP has been received.
SMBus frame.
received.
slave.
response value is needed (only when hard-
ware ACK is not enabled).
when STA is low (unwanted repeated START).
ate a STOP or repeated START condition.
(excluding ACK bits).
(ACKNOWLEDGE).
ACK/NACK received.
slave address + R/W has been received.
Table 22.3. Sources for Hardware Changes to SMB0CN
Set by Hardware When:
Rev. 1.0
C8051F91x-C8051F90x
• A STOP is generated.
• Arbitration is lost.
• A START is detected.
• Arbitration is lost.
• SMB0DAT is not written before the
• Must be cleared by software.
• A pending STOP is generated.
• After each ACK cycle.
• Each time SI is cleared.
• The incoming ACK value is high (NOT
• Must be cleared by software.
start of an SMBus frame.
ACKNOWLEDGE).
Cleared by Hardware When:
235
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