C8051F902-GU Silicon Laboratories Inc, C8051F902-GU Datasheet - Page 234
![IC MCU 8BIT 8KB FLASH 24QSOP](/photos/12/15/121586/c8051f9xx_24-qsop_sml.jpg)
C8051F902-GU
Manufacturer Part Number
C8051F902-GU
Description
IC MCU 8BIT 8KB FLASH 24QSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F902-GU
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QSOP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 15x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
768 B
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F912DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Package
24QSOP
Device Core
8051
Family Name
C8051F90x
Maximum Speed
25 MHz
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1849-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F902-GU
Manufacturer:
SEMIKRON
Quantity:
45
Company:
Part Number:
C8051F902-GU
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
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C8051F91x-C8051F90x
SFR Definition 22.2. SMB0CN: SMBus Control
SFR Page = 0x0; SFR Address = 0xC0; Bit-Addressable
234
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
ARBLOST SMBus Arbitration Lost
TXMODE SMBus Transmit Mode
MASTER SMBus Master/Slave
ACKRQ
Name
MASTER
STO
ACK
STA
SI
R
7
0
Indicator. This read-only bit
indicates when the SMBus is
operating as a master.
Indicator. This read-only bit
indicates when the SMBus is
operating as a transmitter.
SMBus Start Flag.
SMBus Stop Flag.
SMBus Acknowledge
Request.
Indicator.
SMBus Acknowledge.
SMBus Interrupt Flag.
This bit is set by hardware
under the conditions listed in
Table 15.3. SI must be cleared
by software. While SI is set,
SCL is held low and the
SMBus is stalled.
TXMODE
R
6
0
Description
R/W
STA
5
0
STO
R/W
Rev. 1.0
0: SMBus operating in
slave mode.
1: SMBus operating in
master mode.
0: SMBus in Receiver
Mode.
1: SMBus in Transmitter
Mode.
0: No Start or repeated
Start detected.
1: Start or repeated Start
detected.
0: No Stop condition
detected.
1: Stop condition detected
(if in Slave Mode) or pend-
ing (if in Master Mode).
0: No Ack requested
1: ACK requested
0: No arbitration error.
1: Arbitration Lost
0: NACK received.
1: ACK received.
0: No interrupt pending
1: Interrupt Pending
4
0
ACKRQ
Read
R
3
0
ARBLOST
R
2
0
N/A
N/A
0: No Start generated.
1: When Configured as a
Master, initiates a START
or repeated START.
0: No STOP condition is
transmitted.
1: When configured as a
Master, causes a STOP
condition to be transmit-
ted after the next ACK
cycle.
Cleared by Hardware.
N/A
N/A
0: Send NACK
1: Send ACK
0: Clear interrupt, and initi-
ate next state machine
event.
1: Force interrupt.
ACK
R/W
1
0
Write
R/W
SI
0
0
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