ST72F321BR9T6 STMicroelectronics, ST72F321BR9T6 Datasheet - Page 158

• Manufacturer Part Number: ST72F321BR9T6
• Description: MCU 8BIT 60KB FLASH/ROM 64-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F321BR9T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7232X-EVAL, ST7232X-SK/RAIS, ST72321B-D/RAIS, ST7MDT20-DVP3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Cpu Family: ST7
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 2KB
• # I/os (max): 48
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3.8V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5586

ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
12.9 CONTROL PIN CHARACTERISTICS
12.9.1 Asynchronous RESET Pin
Subject to general operating conditions for V
Notes:
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels.
3. The I
(I/O ports and control pins) must not exceed I
4. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on
the RESET pin with a duration below t
5. The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in noisy en-
vironments.
6. Data guaranteed by design, not tested in production.
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t
w(RSTL)out
t
t
Symbol
h(RSTL)in
g(RSTL)in
V
R
V
V
V
I
hys
IO
OL
ON
IH
IL
IO
current sunk must always respect the absolute maximum rating specified in
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Output low level voltage
Input current on RESET pin
Weak pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
Parameter
1)
5)
1)
3)
h(RSTL)in
4)
VSS
2)
can be ignored.
.
DD
V
Stretch applied on
external pulse
Internal reset sources
, f
DD
CPU
=5V
Conditions
, and T
I
IO
=+2mA
A
unless otherwise specified.
0.7xV
Min
2.5
20
20
0
DD
Section 12.2.2
Typ
2.5
0.2
200
30
30
2
0.3xV
and the sum of I
Max
120
42
42
0.5
6)
6)
DD
Unit
mA
kΩ
μs
μs
μs
ns
V
V
IO