ST72F325K4T6 STMicroelectronics, ST72F325K4T6 Datasheet - Page 66

• Manufacturer Part Number: ST72F325K4T6
• Description: MCU 8BIT 16KB FLASH/ROM 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F325K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7232X-EVAL, ST7232X-SK/RAIS, ST72325-D/RAIS, ST7MDT20-DVP3, ST7MDT20J-EMU3, ST7MDT20M-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5605

ST72325xx
ON-CHIP PERIPHERALS (Cont’d)
Independent PWM signal generation
This mode allows up to four Pulse Width Modulat-
ed signals to be generated on the PWMx output
pins with minimum core processing overhead.
This function is stopped during HALT mode.
Each PWMx output signal can be selected inde-
pendently using the corresponding OEx bit in the
PWM Control register (PWMCR). When this bit is
set, the corresponding I/O pin is configured as out-
put push-pull alternate function.
The PWM signals all have the same frequency
which is controlled by the counter period and the
ARTARR register value.
When a counter overflow occurs, the PWMx pin
level is changed depending on the corresponding
OPx (output polarity) bit in the PWMCR register.
Figure 41. PWM Auto-reload Timer Function
Figure 42. PWM Signal from 0% to 100% Duty Cycle
66/197
f
AUTO-RELOAD
PWM
DUTY CYCLE
(PWMDCRx)
WITH OEx=1
AND OPx=0
REGISTER
REGISTER
WITH OEx=1
AND OPx=1
(ARTARR)
= f
OCRx=FCh
OCRx=FDh
OCRx=FEh
OCRx=FFh
COUNTER
f
COUNTER
COUNTER
255
000
/ (256 - ARTARR)
FDh
FEh
ARTARR=FDh
FFh
FDh
When the counter reaches the value contained in
one of the output compare register (OCRx) the
corresponding PWMx pin level is restored.
It should be noted that the reload values will also
affect the value and the resolution of the duty cycle
of the PWM output signal. To obtain a signal on a
PWMx pin, the contents of the OCRx register must
be greater than the contents of the ARTARR reg-
ister.
The maximum available resolution for the PWMx
duty cycle is:
Note: To get the maximum resolution (1/256), the
ARTARR register must be 0. With this maximum
resolution, 0% and 100% can be obtained by
changing the polarity.
Resolution = 1 / (256 - ARTARR)
FEh
FFh
FDh
FEh
t
t