Z8F0431SJ020SG Zilog, Z8F0431SJ020SG Datasheet - Page 96
Z8F0431SJ020SG
Manufacturer Part Number
Z8F0431SJ020SG
Description
IC ENCORE XP MCU FLASH 4K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Specifications of Z8F0431SJ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4627-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F0431SJ020SG
Manufacturer:
Zilog
Quantity:
784
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Table 55. Watchdog Timer Approximate Time-Out Delays (Continued)
PS025111-1207
WDT Reload Value
(Hex)
FFFFFF
000400
Watchdog Timer Refresh
Watchdog Timer Time-Out Response
On first enable, the Watchdog Timer is loaded with the value in the Watchdog Timer
reload registers. The Watchdog Timer counts down to
is executed by the eZ8 CPU. Execution of the WDT instruction causes the downcounter to
be reloaded with the WDT reload value stored in the Watchdog Timer reload registers.
Counting resumes following the Reload operation.
When the Z8 Encore!
On-Chip Debugger), the Watchdog Timer needs to be continuously refreshed to prevent
any WDT time-outs.
The Watchdog Timer times out when the counter reaches
Watchdog Timer generates either an interrupt or a system reset. The WDT_RES Flash
option bit determines the time-out response of the Watchdog Timer. See
on page 117 for information regarding programming of the WDT_RES Flash option bit.
WDT Interrupt in Normal Operation
If configured to generate an interrupt when a time-out occurs, the Watchdog Timer issues
an interrupt request to the interrupt controller and sets the WDT status bit in the reset status
register. If interrupts are enabled, the eZ8 CPU responds to the interrupt request by
fetching the Watchdog Timer interrupt vector and executing code from the vector address.
After time-out and interrupt generation, the Watchdog Timer counter resets to its
maximum value of
automatically return to its reload value.
The reset status register
interrupt. This read clears the WDT time-out flag and prevents further WDT interrupts
occurring immediately.
WDT Reload Value
(Decimal)
16,777,215
1024
FFFFFH
®
F0830 Series devices are operating in DEBUG mode (using the
(Table
and continues counting. The Watchdog Timer counter will not
Approximate Time-Out Delay
(with 10 kHz typical WDT oscillator frequency)
Typical
11on page 30) must be read before clearing the WDT
28 minutes
102 ms
000000H
000000H
Z8 Encore!
Description
Default time-out delay
Maximum time-out delay
unless a WDT instruction
Product Specification
. A time-out of the
Flash Option Bits
®
F0830 Series
Watchdog Timer
86
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