Z8F0431SJ020SG Zilog, Z8F0431SJ020SG Datasheet - Page 14
![IC ENCORE XP MCU FLASH 4K 28SOIC](/photos/6/91/69136/269-28-soic_sml.jpg)
Z8F0431SJ020SG
Manufacturer Part Number
Z8F0431SJ020SG
Description
IC ENCORE XP MCU FLASH 4K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Specifications of Z8F0431SJ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4627-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F0431SJ020SG
Manufacturer:
Zilog
Quantity:
784
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CPU and Peripheral Overview
PS025111-1207
eZ8 CPU Features
General Purpose Input/Output
Flash Controller
The eZ8 CPU, Zilog’s latest 8-bit CPU meets the continuing demand for faster and more
code-efficient microcontrollers. The eZ8 CPU executes a superset of the original Z8
instruction set. The eZ8 CPU features include:
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For more information regarding the eZ8 CPU, refer to eZ8 CPU Core User Manual
(UM0128) available for download at www.zilog.com.
The Z8 Encore! F0830 Series features up to 25 port pins (Ports A–D) for general purpose
input/output (GPIO). The number of GPIO pins available is a function of package. Each
pin is individually programmable.
The Flash controller programs and erases the Flash memory. It also supports protection
against accidental programming and erasure.
Direct register-to-register architecture allows each register to function as an accumulator,
improving execution time and decreasing the required program memory.
Software stack allows much greater depth in subroutine calls and interrupts than hardware
stacks.
Compatible with existing Z8
Expanded internal register file allows access up to 4 KB.
New instructions improve execution efficiency for code developed using high-level
programming languages, including C.
Pipelined instruction fetch and execution.
New instructions for improved performance including BIT, BSWAP, BTJ, CPC, LDC,
LDCI, LEA, MULT, and SRL.
New instructions support 12-bit linear addressing of the register file.
Up to 10 MIPS operation.
C-compiler friendly.
2 to 9 clock cycles per instruction.
®
CPU code.
Z8 Encore!
Product Specification
®
F0830 Series
Overview
®
4
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