Z8F0431SJ020SG Zilog, Z8F0431SJ020SG Datasheet - Page 31
Z8F0431SJ020SG
Manufacturer Part Number
Z8F0431SJ020SG
Description
IC ENCORE XP MCU FLASH 4K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Specifications of Z8F0431SJ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4627-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F0431SJ020SG
Manufacturer:
Zilog
Quantity:
784
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PS025111-1207
Table 7. Register File Address Map (Continued)
Address (Hex) Register Description
FD0
FD1
FD2
FD3
GPIO Port B
FD4
FD5
FD6
FD7
GPIO Port C
FD8
FD9
FDA
FDB
GPIO Port D
FDC
FDD
FDE
FDF
FE0–FEF
Watchdog Timer (WDT)
FF0
FF1
FF2
FF3
FF4–FF5
Trim Bit Control
FF6
FF7
Flash Memory Controller
FF8
FF8
XX=Undefined
Port A address
Port A control
Port A input data
Port A output data
Port B address
Port B control
Port B input data
Port B output data
Port C address
Port C control
Port C input data
Port C output data
Port D address
Port D control
Reserved
Port D output data
Reserved
Reset status
Watchdog Timer control
Watchdog Timer reload upper byte
Watchdog Timer reload high byte
Watchdog Timer reload low byte
Reserved
Trim bit address
Trim data
Flash control
Flash status
Mnemonic
PAADDR
PACTL
PAIN
PAOUT
PBADDR
PBCTL
PBIN
PBOUT
PCADDR
PCCTL
PCIN
PCOUT
PDADDR
PDCTL
—
PDOUT
—
RSTSTAT
WDTCTL
WDTU
WDTH
WDTL
—
TRMADR
TRMDR
FCTL
FSTAT
Reset (Hex)
00
00
XX
00
00
00
XX
00
00
00
XX
00
00
00
XX
00
XX
XX
XX
FF
FF
FF
XX
00
XX
00
00
Z8 Encore!
Product Specification
®
F0830 Series
Page No
43
45
45
45
43
45
45
45
43
45
45
45
43
45
45
88
88
89
89
89
119
119
112
113
Register Map
21
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