EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 30

• Manufacturer Part Number: EP9315-CBZ
• Description: IC ARM9 SOC ENH UNIV 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Cpu Speed: 200MHz
• No. Of Timers: 5
• Digital Ic Case Style: BGA
• Supply Voltage Range: 1.65V To 1.94V, 3V To 3.6V
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Case: BGA
• Dc: 06+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1139

EP9315
Enhanced Universal Platform SOC Processor
PCMCIA Interface
PCMCIA Read Cycle
30
AD setup to signal transition time
DA setup to MCRDn / IORDn rising edge
DA hold from MCRDn / IORDn rising edge
MCDIR hold time
MCADENn/MCDAENn hold time
MCEHn/MCELn/MCREGn hold time
Wait Time
Attribute Mode Timing
Attribute access time
Attribute hold time
Attribute space pre-charge delay time
Common Mode Timing
Common access time
Common hold time
Common space pre-charge delay time
I/O Mode Timing
I/O access time
I/O hold time
I/O space pre-charge delay time
Note:
1
MCWAITn asserted will extend the MCRD / IORD strobe time.
MCADENn/
MCDAENn
MCWAITn
Parameter
MCREGn
MCRDn/
MCEHn/
MCELn/
MCDIR
IORDn
AD
(in)
DA

Copyright 2010 Cirrus Logic (All Rights Reserved)
Figure 17. PCMCIA Read Cycle Timing Measurement
t
ADs
t
p
Symbol
t
t
t
MCDh
MCAh
MCEh
t
ADs
t
t
t
t
t
t
t
t
t
t
t
t
W
A
H
A
H
A
H
s
h
p
p
p
[(AC + 1) × t
[(AA + 1) × t
[(AI + 1) × t
[(HA + 1) × t
[(HC + 1) × t
[(HI + 1) × t
(PC + 1) × t
(PA + 1) × t
(PI + 1) × t
t
W
t
A
t
Min
s
10
0
0
0
0
0
-
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
] - 14
] - 14
] - 14
] - 3
] - 3
] - 3
t
h
(AA + 1) × t
(HA + 1) × t
(AC + 1) × t
(HC + 1) × t
(PC + 1) × t
(PA + 1) × t
(AI + 1) × t
(HI + 1) × t
(PI + 1) × t
t
H
Typ
-
-
-
-
-
-
-
t
t
t
MCAh
MCEh
MCDh
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
t
A
-[2 × t
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
HCLK
]
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS638F2