EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 6

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

EP9302
High-speed ARM9 System-on-chip Processor with MaverickCrunch
Processor Core - ARM920T
The ARM920T is a Harvard architecture processor with
separate 16-kbyte instruction and data caches with an 8-
word line length but a unified memory. The processor
utilizes a five-stage pipeline consisting of fetch, decode,
execute, memory, and write stages. Key features include:
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MaverickCrunch
The
coprocessor designed primarily to accelerate the math
processing required to rapidly encode digital audio
formats. It accelerates single and double precision
integer and floating point operations plus an integer
multiply-accumulate
considerably faster than the ARM920T's native MAC
instruction. The ARM920T coprocessor interface is
utilized thereby sharing its memory interface and
instruction stream. Hardware forwarding and interlock
allows the ARM to handle looping and addressing while
MaverickCrunch handles computation. Features include:
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MaverickKey
MaverickKey unique hardware programmed IDs are a
solution to the growing concern over secure web content
and commerce. With Internet security playing an
important role in the delivery of digital media such as
books or music, traditional software methods are quickly
becoming unreliable. The MaverickKey unique IDs
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ARM (32-bit) and Thumb (16-bit compressed)
instruction sets
32-bit Advanced Micro-Controller Bus Architecture
(AMBA)
16 kbyte Instruction Cache with lockdown
16 kbyte Data Cache (programmable write-through or
write-back) with lockdown
MMU for Linux
operating systems
Translation Look Aside Buffers with 64 Data and 64
Instruction Entries
Programmable Page Sizes of 1 Mbyte, 64 kbyte,
4 kbyte, and 1 kbyte
Independent lockdown of TLB Entries
IEEE-754 single and double precision floating point
32 / 64-bit integer
Add / multiply / compare
Integer MAC 32-bit input with 72-bit accumulate
Integer Shifts
Floating point to/from integer conversion
Sixteen 64-bit register files
Four 72-bit accumulators
MaverickCrunch
™
®
, Microsoft
Unique ID
™
(MAC)
Math Engine
Engine
®
Windows
instruction

is
Copyright 2010 Cirrus Logic (All Rights Reserved)
a
®
CE and other
mixed-mode
that
is
provide OEMs with a method of utilizing specific
hardware IDs such as those assigned for SDMI (Secure
Digital Music Initiative) or any other authentication
mechanism.
Both a specific 32-bit ID as well as a 128-bit random ID
are programmed into the EP9302 through the use of
laser probing technology. These IDs can then be used to
match secure copyrighted content with the ID of the
target device the EP9302 is powering, and then deliver
the copyrighted information over a secure connection. In
addition, secure transactions can benefit by also
matching device IDs to server IDs. MaverickKey IDs
provide a level of hardware security required for today’s
Internet appliances.
General Purpose Memory Interface (SDRAM,
SRAM, ROM, Flash)
The EP9302 features a unified memory address model
where all memory devices are accessed over a common
address/data bus. Memory accesses are performed via
the Processor bus. The SRAM memory controller
supports 8 and 16-bit devices and accommodates an
internal boot ROM concurrently with 16-bit SDRAM
memory.
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SDCLK
SDCLKEN
SDCSn[3:0]
RASn
CASn
SDWEn
CSn[7:6] and CSn[3:0]
AD[25:0]
DA[15:0]
DQMn[1:0]
WRn
RDn
WAITn
Table B. General Purpose Memory Interface Pin Assignments
1 to 4 banks of 16-bit ,100-MHz SDRAM
Address and data bus shared between SDRAM,
SRAM, ROM, and FLASH memory
NOR FLASH memory supported
Pin Mnemonic
SDRAM Write Enable
Chip Selects 7, 6, 3, 2, 1, 0
Data Bus 15-0
SDRAM Output Enables / Data Masks
SRAM Write Strobe
SDRAM Clock
SDRAM Clock Enable
SDRAM Chip Selects 3-0
SDRAM RAS
SDRAM CAS
Address Bus 25-0
SRAM Read / OE Strobe
SRAM Wait Input
Pin Description
DS653F2