EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 22

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-CQZ

Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-CQZ

Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137

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EP9302
High-speed ARM9 System-on-chip Processor with MaverickCrunch
Static Memory Burst Read Cycle
22
CSn assert to Address 1 transition time
Address assert time
AD transition to CSn deassert time
AD hold from CSn deassert time
CSn to RDn delay time
CSn to DQMn assert delay time
DA setup to AD transition time
DA setup to CSn deassert time
DA hold from AD transition time
DA hold from RDn deassert time
DQMn
WAIT
Note:
WRn
CSn
RDn
AD
DA
These characteristics are valid when the Page Mode Enable (Burst Mode) bit is set. See the User's Guide for details.
t
ADs
t
DQMd
Parameter
t
RDd
t
Figure 10. Static Memory Burst Read Cycle Timing Measurement
ADd1
Copyright 2010 Cirrus Logic (All Rights Reserved)
t
DAs1
Symbol
t
t
t
t
t
t
t
t
DQMd
t
ADd1
ADd2
ADd3
t
DAh1
DAh2
DAs1
DAs2
ADh
RDd
t
DAh1
t
ADd2
t
t
HCLK
DAs1
t
Min
HCLK
15
0
0
-
-
-
-
-
+ 12
t
DAh1
t
ADd2
t
t
t
HCLK
HCLK
HCLK
t
DAs1
× (WST1 + 1)
× (WST2 + 1)
× (WST1 + 2)
Typ
-
-
-
-
-
-
-
t
t
ADd3
DAh1
t
DAs2
Max
3
1
-
-
-
-
-
-
-
-
t
DAh2
DS653F2
Unit
t
ADh
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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