ATMEGA168V-10AU Atmel, ATMEGA168V-10AU Datasheet - Page 255

IC AVR MCU 16K 10MHZ 32TQFP

ATMEGA168V-10AU

Manufacturer Part Number
ATMEGA168V-10AU
Description
IC AVR MCU 16K 10MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA168V-10AU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire, SPI, USART, Serial
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
23
Number Of Timers
3 bit
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
10MHz
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
TQFP
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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24.7
24.8
24.8.1
2545T–AVR–05/11
ADC conversion result
Register description
ADMUX – ADC multiplexer selection register
After the conversion is complete (ADIF is high), the conversion result can be found in the ADC
Result Registers (ADCL, ADCH).
For single ended conversion, the result is
where V
Table 24-2
sents the selected reference voltage minus one LSB.
• Bit 7:6 – REFS1:0: Reference selection bits
These bits select the voltage reference for the ADC, as shown in
changed during a conversion, the change will not go in effect until this conversion is complete
(ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external
reference voltage is being applied to the AREF pin.
Table 24-2.
• Bit 5 – ADLAR: ADC left adjust result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
sions. For a complete description of this bit, see
page
• Bit 4 – Res: Reserved bit
This bit is an unused bit in the Atmel ATmega48/88/168, and will always read as zero.
Bit
(0x7C)
Read/write
Initial value
REFS1
0
0
1
1
258.
IN
is the voltage on the selected input pin and V
and
REFS0
REFS1
Voltage reference selections for ADC.
R/W
0
1
0
1
7
0
Table 24-3 on page
REFS0
Voltage reference selection
AREF, internal V
AV
Reserved
Internal 1.1V voltage reference with external capacitor at AREF pin
R/W
6
0
CC
with external capacitor at AREF pin
ADLAR
R/W
5
0
256). 0x000 represents analog ground, and 0x3FF repre-
ADC
ref
turned off
R
4
0
=
V
--------------------------
MUX3
IN
R/W
V
“ADCL and ADCH – The ADC data register” on
3
0
REF
1024
MUX2
R/W
REF
2
0
the selected voltage reference (see
ATmega48/88/168
MUX1
R/W
1
0
Table
MUX0
R/W
0
0
24-2. If these bits are
ADMUX
255

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