ATMEGA168V-10AU Atmel, ATMEGA168V-10AU Datasheet - Page 154
ATMEGA168V-10AU
Manufacturer Part Number
ATMEGA168V-10AU
Description
IC AVR MCU 16K 10MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATAVRTS2080B.pdf
(378 pages)
2.ATMEGA48-20AU.pdf
(35 pages)
3.ATMEGA168V-10AU.pdf
(377 pages)
Specifications of ATMEGA168V-10AU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire, SPI, USART, Serial
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
23
Number Of Timers
3 bit
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
10MHz
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
TQFP
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
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Manufacturer:
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Quantity:
41 576
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Manufacturer:
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2545T–AVR–05/11
Table 18-3.
Note:
Table 18-4
rect PWM mode.
Table 18-4.
Note:
• Bits 5:4 – COM2B1:0: Compare match output B mode
These bits control the Output Compare pin (OC2B) behavior. If one or both of the COM2B1:0
bits are set, the OC2B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2B pin
must be set in order to enable the output driver.
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 18-5.
COM2A1
COM2A1
COM2B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
pare Match is ignored, but the set or clear is done at TOP. See
page 148
shows the COM2A1:0 bit functionality when the WGM22:0 bits are set to phase cor-
Compare output mode, fast PWM mode
Compare output mode, phase correct PWM Mode
Compare output mode, non-PWM mode.
COM2A0
COM2B0
COM2A0
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 18-5
Description
Normal port operation, OC2A disconnected
WGM22 = 0: Normal port operation, OC0A disconnected
WGM22 = 1: Toggle OC2A on compare match
Clear OC2A on compare match, set OC2A at BOTTOM,
(non-inverting mode)
Set OC2A on compare match, clear OC2A at BOTTOM,
(inverting mode)
Description
Normal port operation, OC2A disconnected
WGM22 = 0: Normal port operation, OC2A disconnected
WGM22 = 1: Toggle OC2A on compare match
Clear OC2A on compare match when up-counting
Set OC2A on compare match when down-counting
Set OC2A on compare match when up-counting
Clear OC2A on compare match when down-counting
Description
Normal port operation, OC2B disconnected
Toggle OC2B on compare match
Clear OC2B on compare match
Set OC2B on compare match
shows the COM2B1:0 bit functionality when the WGM22:0 bits
(1)
.
ATmega48/88/168
(1)
.
“Fast PWM mode” on page 146
“Phase correct PWM mode” on
154
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