PIC18LF2321-I/SS Microchip Technology, PIC18LF2321-I/SS Datasheet - Page 123
![IC PIC MCU FLASH 4KX16 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC18LF2321-I/SS
Manufacturer Part Number
PIC18LF2321-I/SS
Description
IC PIC MCU FLASH 4KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(402 pages)
3.PIC18F2221-ISO.pdf
(8 pages)
4.PIC18F2221-ISO.pdf
(30 pages)
5.PIC18F2221-ISO.pdf
(46 pages)
6.PIC18F2321-IML.pdf
(396 pages)
Specifications of PIC18LF2321-I/SS
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18F2221-ISO PDF datasheet #5
- PIC18F2321-IML PDF datasheet #6
- Current page: 123 of 396
- Download datasheet (7Mb)
FIGURE 10-3:
FIGURE 10-4:
TABLE 10-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
© 2007 Microchip Technology Inc.
PORTD
LATD
TRISD
PORTE
LATE
TRISE
INTCON
PIR1
PIE1
IPR1
ADCON1
Legend:
Note 1:
Name
PORTD<7:0>
PORTD<7:0>
PSPIF
— = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
These bits are unimplemented on 28-pin devices and read as ‘0’.
PSPIF
PORTD Data Latch Register (Read and Write to Data Latch)
PORTD Data Direction Control Register
OBF
GIE/GIEH
OBF
PSPIP
PSPIF
PSPIE
CS
WR
RD
IBF
CS
WR
RD
IBF
Bit 7
RD7
IBF
—
—
—
(1)
(1)
(1)
PARALLEL SLAVE PORT WRITE WAVEFORMS
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
PEIE/GIEL
Q1
ADIE
ADIP
ADIF
Bit 6
OBF
RD6
—
—
—
Q2
Q2
TMR0IF
VCFG1
IBOV
RCIF
RCIE
RCIP
Bit 5
RD5
Q3
Q3
—
—
Q4
Q4
PSPMODE
VCFG0
Preliminary
INT0IE
TXIE
TXIP
Bit 4
TXIF
RD4
—
—
Q1
Q1
PCFG3
Q2
SSPIF
SSPIE
SSPIP
Q2
RBIE
Bit 3
RD3
RE3
PIC18F4321 FAMILY
—
—
Q3
Q3
PORTE Data Latch Register
(Read and Write to Data Latch)
TMR0IF
CCP1IE
CCP1IP
TRISE2
CCP1IF
PCFG2
Bit 2
RD2
RE2
Q4
Q4
TMR2IF
TMR2IE
TMR2IP
TRISE1
PCFG1
Q1
INT0IF
Q1
Bit 1
RD1
RE1
Q2
Q2
TMR1IF
TMR1IE
TMR1IP
TRISE0
PCFG0
RBIF
DS39689E-page 121
Bit 0
RD0
RE0
Q3
Q3
Values on
Q4
Reset
Q4
page
52
52
52
52
52
52
49
52
52
52
51
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