PIC16F636-I/ST Microchip Technology, PIC16F636-I/ST Datasheet - Page 135

• Manufacturer Part Number: PIC16F636-I/ST
• Description: IC MCU FLASH 2KX14 14TSSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F636-I/ST

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 14-TSSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LVD, POR, WDT
• Number Of I /o: 11
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/SPI/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Package: 14TSSOP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162057 - MPLAB ICD 2 HEADER 14DIP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.2
ADDLW
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
© 2005 Microchip Technology Inc.
Instruction Descriptions
Add Literal and W
[ label ] ADDLW
0
(W) + k
The contents of the W register are
added to the eight-bit literal ‘k’ and
the result is placed in the W register.
Add W and f
[ label ] ADDWF
0
d
(W) + (f)
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the result
is stored in the W register. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
AND W with f
[ label ] ANDWF
0
d
(W) .AND. (f)
Z
AND the W register with register
‘f’. If ‘d’ is ‘0’, the result is stored in
the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
AND Literal with W
[ label ] ANDLW
0
(W) .AND. (k)
Z
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
k
f
0,1
f
[0,1]
k
127
255
127
255
(W)
(destination)
(destination)
(W)
k
f,d
f,d
k
PIC12F635/PIC16F636/639
Preliminary
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSS
Syntax:
Operands:
Operation:
Status Affected: None
Description:
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is executed.
If bit ‘b’ is ‘1’, then the next instruction is
discarded and a NOP is executed instead,
making this a 2-cycle instruction.
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0
0
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is discarded and a NOP
is executed instead, making this a
2-cycle instruction.
Bit Clear f
[ label ] BCF
0
0
0
None
Bit ‘b’ in register ‘f’ is cleared.
Bit Set f
[ label ] BSF
0
0
1
None
Bit ‘b’ in register ‘f’ is set.
f
b < 7
f
b
f
b
f
b
127
(f<b>)
(f<b>)
127
7
127
127
7
7
f,b
f,b
DS41232B-page 133